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[AMDGPU] Added 'a' constraint documentation. NFC.

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AGPR inline asm constraint was missing from the LangRef.rst.
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Stanislav Mekhanoshin 2020-05-05 13:52:04 -07:00
parent 02d6ea4855
commit 965e88e480
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docs/LangRef.rst
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@ -4104,6 +4104,7 @@ AMDGPU:
- ``r``: A 32 or 64-bit integer register.
- ``[0-9]v``: The 32-bit VGPR register, number 0-9.
- ``[0-9]s``: The 32-bit SGPR register, number 0-9.
- ``[0-9]a``: The 32-bit AGPR register, number 0-9.
All ARM modes: