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auto-generate checks

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llvm-svn: 268061
This commit is contained in:
Sanjay Patel 2016-04-29 16:39:37 +00:00
parent 7526baa6fd
commit 968caa561c
1 changed files with 40 additions and 43 deletions
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83
test/Transforms/InstCombine/compare-signs.ll
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@ -1,67 +1,64 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -instcombine -S < %s | FileCheck %s
; PR5438
; TODO: This should also optimize down.
;define i32 @test1(i32 %a, i32 %b) nounwind readnone {
;entry:
; %0 = icmp sgt i32 %a, -1 ; <i1> [#uses=1]
; %1 = icmp slt i32 %b, 0 ; <i1> [#uses=1]
; %2 = xor i1 %1, %0 ; <i1> [#uses=1]
; %3 = zext i1 %2 to i32 ; <i32> [#uses=1]
; %0 = icmp sgt i32 %a, -1
; %1 = icmp slt i32 %b, 0
; %2 = xor i1 %1, %0
; %3 = zext i1 %2 to i32
; ret i32 %3
;}
; TODO: This optimizes partially but not all the way.
;define i32 @test2(i32 %a, i32 %b) nounwind readnone {
;entry:
; %0 = and i32 %a, 8 ;<i32> [#uses=1]
; %1 = and i32 %b, 8 ;<i32> [#uses=1]
; %2 = icmp eq i32 %0, %1 ;<i1> [#uses=1]
; %3 = zext i1 %2 to i32 ;<i32> [#uses=1]
; %0 = and i32 %a, 8
; %1 = and i32 %b, 8
; %2 = icmp eq i32 %0, %1
; %3 = zext i1 %2 to i32
; ret i32 %3
;}
define i32 @test3(i32 %a, i32 %b) nounwind readnone {
; CHECK-LABEL: @test3(
entry:
; CHECK: [[XOR1:%.*]] = xor i32 %a, %b
; CHECK: [[SHIFT:%.*]] = lshr i32 [[XOR1]], 31
; CHECK: [[XOR2:%.*]] = xor i32 [[SHIFT]], 1
%0 = lshr i32 %a, 31 ; <i32> [#uses=1]
%1 = lshr i32 %b, 31 ; <i32> [#uses=1]
%2 = icmp eq i32 %0, %1 ; <i1> [#uses=1]
%3 = zext i1 %2 to i32 ; <i32> [#uses=1]
ret i32 %3
; CHECK-NOT: icmp
; CHECK-NOT: zext
; CHECK: ret i32 [[XOR2]]
; CHECK-NEXT: [[T2_UNSHIFTED:%.*]] = xor i32 %a, %b
; CHECK-NEXT: [[T2_UNSHIFTED_LOBIT:%.*]] = lshr i32 [[T2_UNSHIFTED]], 31
; CHECK-NEXT: [[T2_UNSHIFTED_LOBIT_NOT:%.*]] = xor i32 [[T2_UNSHIFTED_LOBIT]], 1
; CHECK-NEXT: ret i32 [[T2_UNSHIFTED_LOBIT_NOT]]
;
%t0 = lshr i32 %a, 31
%t1 = lshr i32 %b, 31
%t2 = icmp eq i32 %t0, %t1
%t3 = zext i1 %t2 to i32
ret i32 %t3
}
; Variation on @test3: checking the 2nd bit in a situation where the 5th bit
; is one, not zero.
define i32 @test3i(i32 %a, i32 %b) nounwind readnone {
; CHECK-LABEL: @test3i(
entry:
; CHECK: xor i32 %a, %b
; CHECK: lshr i32 %0, 31
; CHECK: xor i32 %1, 1
%0 = lshr i32 %a, 29 ; <i32> [#uses=1]
%1 = lshr i32 %b, 29 ; <i32> [#uses=1]
%2 = or i32 %0, 35
%3 = or i32 %1, 35
%4 = icmp eq i32 %2, %3 ; <i1> [#uses=1]
%5 = zext i1 %4 to i32 ; <i32> [#uses=1]
ret i32 %5
; CHECK-NOT: icmp
; CHECK-NOT: zext
; CHECK: ret i32 %2
; CHECK-NEXT: [[T01:%.*]] = xor i32 %a, %b
; CHECK-NEXT: [[TMP1:%.*]] = lshr i32 [[T01]], 31
; CHECK-NEXT: [[T4:%.*]] = xor i32 [[TMP1]], 1
; CHECK-NEXT: ret i32 [[T4]]
;
%t0 = lshr i32 %a, 29
%t1 = lshr i32 %b, 29
%t2 = or i32 %t0, 35
%t3 = or i32 %t1, 35
%t4 = icmp eq i32 %t2, %t3
%t5 = zext i1 %t4 to i32
ret i32 %t5
}
define i1 @test4a(i32 %a) {
; CHECK-LABEL: @test4a(
entry:
; CHECK: %c = icmp slt i32 %a, 1
; CHECK-NEXT: ret i1 %c
; CHECK-NEXT: [[C:%.*]] = icmp slt i32 %a, 1
; CHECK-NEXT: ret i1 [[C]]
;
%l = ashr i32 %a, 31
%na = sub i32 0, %a
%r = lshr i32 %na, 31
@ -72,9 +69,9 @@ define i1 @test4a(i32 %a) {
define i1 @test4b(i64 %a) {
; CHECK-LABEL: @test4b(
entry:
; CHECK: %c = icmp slt i64 %a, 1
; CHECK-NEXT: ret i1 %c
; CHECK-NEXT: [[C:%.*]] = icmp slt i64 %a, 1
; CHECK-NEXT: ret i1 [[C]]
;
%l = ashr i64 %a, 63
%na = sub i64 0, %a
%r = lshr i64 %na, 63
@ -85,9 +82,9 @@ define i1 @test4b(i64 %a) {
define i1 @test4c(i64 %a) {
; CHECK-LABEL: @test4c(
entry:
; CHECK: %c = icmp slt i64 %a, 1
; CHECK-NEXT: ret i1 %c
; CHECK-NEXT: [[C:%.*]] = icmp slt i64 %a, 1
; CHECK-NEXT: ret i1 [[C]]
;
%l = ashr i64 %a, 63
%na = sub i64 0, %a
%r = lshr i64 %na, 63