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Add definitions for TEST instructions

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llvm-svn: 6498
This commit is contained in:
Chris Lattner 2003-06-01 01:56:39 +00:00
parent f37c407475
commit 96f7ec62fe
1 changed files with 7 additions and 0 deletions
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7
lib/Target/X86/X86InstrInfo.def
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@ -182,6 +182,13 @@ I(XORrr8 , "xor", 0x30, M_2_ADDR_FLAG, X86II::MRMDestReg, NoIR, NoIR)
I(XORrr16 , "xor", 0x31, M_2_ADDR_FLAG, X86II::MRMDestReg | X86II::OpSize, NoIR, NoIR) // R16 ^= R16
I(XORrr32 , "xor", 0x31, M_2_ADDR_FLAG, X86II::MRMDestReg, NoIR, NoIR) // R32 ^= R32
// test instructions are just like and, except they don't generate a result (but
// they do set flags).
I(TESTri8 , "test", 0xF6, 0, X86II::MRMS0r | X86II::Arg8, NoIR, NoIR) // flags = R8 & imm8
I(TESTri16 , "test", 0xF7, 0, X86II::MRMS0r | X86II::Arg16 | X86II::OpSize, NoIR, NoIR) // flags = R16 & imm16
I(TESTri32 , "test", 0xF7, 0, X86II::MRMS0r | X86II::Arg32, NoIR, NoIR) // flags = R32 & imm32
// Shift instructions
I(SHLrr8 , "shl", 0xD2, M_2_ADDR_FLAG, X86II::MRMS4r, O_CL, NoIR) // R8 <<= cl
I(SHLrr16 , "shl", 0xD3, M_2_ADDR_FLAG, X86II::MRMS4r | X86II::OpSize, O_CL, NoIR) // R16 <<= cl