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ScheduleDAG: Cleanup dumping code; NFC

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- Instead of having both `SUnit::dump(ScheduleDAG*)` and
  `ScheduleDAG::dumpNode(ScheduleDAG*)`, just keep the latter around.
- Add `ScheduleDAG::dump()` and avoid code duplication in several
  places. Implement it for different ScheduleDAG variants.
- Add `ScheduleDAG::dumpNodeName()` in favor of the `SUnit::print()`
  functions. They were only ever used for debug dumping and putting the
  function into ScheduleDAG is consistent with the `dumpNode()` change.

llvm-svn: 342520
This commit is contained in:
Matthias Braun 2018-09-19 00:23:35 +00:00
parent 4a3b31cfb1
commit 9728bec113
23 changed files with 169 additions and 160 deletions
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5
include/llvm/CodeGen/MachineScheduler.h
View File

@ -466,6 +466,9 @@ public:
PressureDiff &getPressureDiff(const SUnit *SU) {
return SUPressureDiffs[SU->NodeNum];
}
const PressureDiff &getPressureDiff(const SUnit *SU) const {
return SUPressureDiffs[SU->NodeNum];
}
/// Compute a DFSResult after DAG building is complete, and before any
/// queue comparisons.
@ -491,6 +494,8 @@ public:
/// Compute the cyclic critical path through the DAG.
unsigned computeCyclicCriticalPath();
void dump() const override;
protected:
// Top-Level entry points for the schedule() driver...

17
include/llvm/CodeGen/ScheduleDAG.h
View File

@ -236,8 +236,7 @@ class TargetRegisterInfo;
Contents.Reg = Reg;
}
raw_ostream &print(raw_ostream &O,
const TargetRegisterInfo *TRI = nullptr) const;
void dump(const TargetRegisterInfo *TRI = nullptr) const;
};
template <>
@ -459,12 +458,7 @@ class TargetRegisterInfo;
/// edge occurs first.
void biasCriticalPath();
void dump(const ScheduleDAG *G) const;
void dumpAll(const ScheduleDAG *G) const;
raw_ostream &print(raw_ostream &O,
const SUnit *Entry = nullptr,
const SUnit *Exit = nullptr) const;
raw_ostream &print(raw_ostream &O, const ScheduleDAG *G) const;
void dumpAttributes() const;
private:
void ComputeDepth();
@ -597,7 +591,9 @@ class TargetRegisterInfo;
virtual void viewGraph(const Twine &Name, const Twine &Title);
virtual void viewGraph();
virtual void dumpNode(const SUnit *SU) const = 0;
virtual void dumpNode(const SUnit &SU) const = 0;
virtual void dump() const = 0;
void dumpNodeName(const SUnit &SU) const;
/// Returns a label for an SUnit node in a visualization of the ScheduleDAG.
virtual std::string getGraphNodeLabel(const SUnit *SU) const = 0;
@ -614,6 +610,9 @@ class TargetRegisterInfo;
unsigned VerifyScheduledDAG(bool isBottomUp);
#endif
protected:
void dumpNodeAll(const SUnit &SU) const;
private:
/// Returns the MCInstrDesc of this SDNode or NULL.
const MCInstrDesc *getNodeDesc(const SDNode *Node) const;

3
include/llvm/CodeGen/ScheduleDAGInstrs.h
View File

@ -327,7 +327,8 @@ namespace llvm {
/// whole MachineFunction. By default does nothing.
virtual void finalizeSchedule() {}
void dumpNode(const SUnit *SU) const override;
void dumpNode(const SUnit &SU) const override;
void dump() const override;
/// Returns a label for a DAG node that points to an instruction.
std::string getGraphNodeLabel(const SUnit *SU) const override;

3
lib/CodeGen/DFAPacketizer.cpp
View File

@ -250,8 +250,7 @@ void VLIWPacketizerList::PacketizeMIs(MachineBasicBlock *MBB,
LLVM_DEBUG({
dbgs() << "Scheduling DAG of the packetize region\n";
for (SUnit &SU : VLIWScheduler->SUnits)
SU.dumpAll(VLIWScheduler);
VLIWScheduler->dump();
});
// Generate MI -> SU map.

4
lib/CodeGen/LatencyPriorityQueue.cpp
View File

@ -145,9 +145,9 @@ void LatencyPriorityQueue::remove(SUnit *SU) {
LLVM_DUMP_METHOD void LatencyPriorityQueue::dump(ScheduleDAG *DAG) const {
dbgs() << "Latency Priority Queue\n";
dbgs() << " Number of Queue Entries: " << Queue.size() << "\n";
for (auto const &SU : Queue) {
for (const SUnit *SU : Queue) {
dbgs() << " ";
SU->dump(DAG);
DAG->dumpNode(*SU);
}
}
#endif

9
lib/CodeGen/MachinePipeliner.cpp
View File

@ -886,10 +886,7 @@ void SwingSchedulerDAG::schedule() {
Topo.InitDAGTopologicalSorting();
postprocessDAG();
changeDependences();
LLVM_DEBUG({
for (unsigned su = 0, e = SUnits.size(); su != e; ++su)
SUnits[su].dumpAll(this);
});
LLVM_DEBUG(dump());
NodeSetType NodeSets;
findCircuits(NodeSets);
@ -1638,8 +1635,8 @@ void SwingSchedulerDAG::computeNodeFunctions(NodeSetType &NodeSets) {
for (ScheduleDAGTopologicalSort::const_iterator I = Topo.begin(),
E = Topo.end();
I != E; ++I) {
SUnit *SU = &SUnits[*I];
SU->dump(this);
const SUnit &SU = SUnits[*I];
dumpNode(SU);
}
});

53
lib/CodeGen/MachineScheduler.cpp
View File

@ -633,7 +633,7 @@ void ScheduleDAGMI::releaseSucc(SUnit *SU, SDep *SuccEdge) {
#ifndef NDEBUG
if (SuccSU->NumPredsLeft == 0) {
dbgs() << "*** Scheduling failed! ***\n";
SuccSU->dump(this);
dumpNode(*SuccSU);
dbgs() << " has been released too many times!\n";
llvm_unreachable(nullptr);
}
@ -670,7 +670,7 @@ void ScheduleDAGMI::releasePred(SUnit *SU, SDep *PredEdge) {
#ifndef NDEBUG
if (PredSU->NumSuccsLeft == 0) {
dbgs() << "*** Scheduling failed! ***\n";
PredSU->dump(this);
dumpNode(*PredSU);
dbgs() << " has been released too many times!\n";
llvm_unreachable(nullptr);
}
@ -764,10 +764,7 @@ void ScheduleDAGMI::schedule() {
SmallVector<SUnit*, 8> TopRoots, BotRoots;
findRootsAndBiasEdges(TopRoots, BotRoots);
LLVM_DEBUG(if (EntrySU.getInstr() != nullptr) EntrySU.dumpAll(this);
for (const SUnit &SU
: SUnits) SU.dumpAll(this);
if (ExitSU.getInstr() != nullptr) ExitSU.dumpAll(this););
LLVM_DEBUG(dump());
if (ViewMISchedDAGs) viewGraph();
// Initialize the strategy before modifying the DAG.
@ -920,7 +917,7 @@ void ScheduleDAGMI::placeDebugValues() {
LLVM_DUMP_METHOD void ScheduleDAGMI::dumpSchedule() const {
for (MachineBasicBlock::iterator MI = begin(), ME = end(); MI != ME; ++MI) {
if (SUnit *SU = getSUnit(&(*MI)))
SU->dump(this);
dumpNode(*SU);
else
dbgs() << "Missing SUnit\n";
}
@ -1171,6 +1168,29 @@ void ScheduleDAGMILive::updatePressureDiffs(
}
}
void ScheduleDAGMILive::dump() const {
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
if (EntrySU.getInstr() != nullptr)
dumpNodeAll(EntrySU);
for (const SUnit &SU : SUnits) {
dumpNodeAll(SU);
if (ShouldTrackPressure) {
dbgs() << " Pressure Diff : ";
getPressureDiff(&SU).dump(*TRI);
}
dbgs() << " Single Issue : ";
if (SchedModel.mustBeginGroup(SU.getInstr()) &&
SchedModel.mustEndGroup(SU.getInstr()))
dbgs() << "true;";
else
dbgs() << "false;";
dbgs() << '\n';
}
if (ExitSU.getInstr() != nullptr)
dumpNodeAll(ExitSU);
#endif
}
/// schedule - Called back from MachineScheduler::runOnMachineFunction
/// after setting up the current scheduling region. [RegionBegin, RegionEnd)
/// only includes instructions that have DAG nodes, not scheduling boundaries.
@ -1197,22 +1217,7 @@ void ScheduleDAGMILive::schedule() {
// This may initialize a DFSResult to be used for queue priority.
SchedImpl->initialize(this);
LLVM_DEBUG(if (EntrySU.getInstr() != nullptr) EntrySU.dumpAll(this);
for (const SUnit &SU
: SUnits) {
SU.dumpAll(this);
if (ShouldTrackPressure) {
dbgs() << " Pressure Diff : ";
getPressureDiff(&SU).dump(*TRI);
}
dbgs() << " Single Issue : ";
if (SchedModel.mustBeginGroup(SU.getInstr()) &&
SchedModel.mustEndGroup(SU.getInstr()))
dbgs() << "true;";
else
dbgs() << "false;";
dbgs() << '\n';
} if (ExitSU.getInstr() != nullptr) ExitSU.dumpAll(this););
LLVM_DEBUG(dump());
if (ViewMISchedDAGs) viewGraph();
// Initialize ready queues now that the DAG and priority data are finalized.
@ -3186,7 +3191,7 @@ void GenericScheduler::reschedulePhysRegCopies(SUnit *SU, bool isTop) {
if (!Copy->isCopy())
continue;
LLVM_DEBUG(dbgs() << " Rescheduling physreg copy ";
Dep.getSUnit()->dump(DAG));
DAG->dumpNode(*Dep.getSUnit()));
DAG->moveInstruction(Copy, InsertPos);
}
}

12
lib/CodeGen/MacroFusion.cpp
View File

@ -67,8 +67,8 @@ static bool fuseInstructionPair(ScheduleDAGMI &DAG, SUnit &FirstSU,
SI.setLatency(0);
LLVM_DEBUG(
dbgs() << "Macro fuse: "; FirstSU.print(dbgs(), &DAG); dbgs() << " - ";
SecondSU.print(dbgs(), &DAG); dbgs() << " / ";
dbgs() << "Macro fuse: "; DAG.dumpNodeName(FirstSU); dbgs() << " - ";
DAG.dumpNodeName(SecondSU); dbgs() << " / ";
dbgs() << DAG.TII->getName(FirstSU.getInstr()->getOpcode()) << " - "
<< DAG.TII->getName(SecondSU.getInstr()->getOpcode()) << '\n';);
@ -80,8 +80,8 @@ static bool fuseInstructionPair(ScheduleDAGMI &DAG, SUnit &FirstSU,
if (SI.isWeak() || isHazard(SI) ||
SU == &DAG.ExitSU || SU == &SecondSU || SU->isPred(&SecondSU))
continue;
LLVM_DEBUG(dbgs() << " Bind "; SecondSU.print(dbgs(), &DAG);
dbgs() << " - "; SU->print(dbgs(), &DAG); dbgs() << '\n';);
LLVM_DEBUG(dbgs() << " Bind "; DAG.dumpNodeName(SecondSU);
dbgs() << " - "; DAG.dumpNodeName(*SU); dbgs() << '\n';);
DAG.addEdge(SU, SDep(&SecondSU, SDep::Artificial));
}
@ -92,8 +92,8 @@ static bool fuseInstructionPair(ScheduleDAGMI &DAG, SUnit &FirstSU,
SUnit *SU = SI.getSUnit();
if (SI.isWeak() || isHazard(SI) || &FirstSU == SU || FirstSU.isSucc(SU))
continue;
LLVM_DEBUG(dbgs() << " Bind "; SU->print(dbgs(), &DAG); dbgs() << " - ";
FirstSU.print(dbgs(), &DAG); dbgs() << '\n';);
LLVM_DEBUG(dbgs() << " Bind "; DAG.dumpNodeName(*SU); dbgs() << " - ";
DAG.dumpNodeName(FirstSU); dbgs() << '\n';);
DAG.addEdge(&FirstSU, SDep(SU, SDep::Artificial));
}
// ExitSU comes last by design, which acts like an implicit dependency

12
lib/CodeGen/PostRASchedulerList.cpp
View File

@ -256,7 +256,7 @@ void SchedulePostRATDList::exitRegion() {
LLVM_DUMP_METHOD void SchedulePostRATDList::dumpSchedule() const {
for (unsigned i = 0, e = Sequence.size(); i != e; i++) {
if (SUnit *SU = Sequence[i])
SU->dump(this);
dumpNode(*SU);
else
dbgs() << "**** NOOP ****\n";
}
@ -414,11 +414,7 @@ void SchedulePostRATDList::schedule() {
postprocessDAG();
LLVM_DEBUG(dbgs() << "********** List Scheduling **********\n");
LLVM_DEBUG(for (const SUnit &SU
: SUnits) {
SU.dumpAll(this);
dbgs() << '\n';
});
LLVM_DEBUG(dump());
AvailableQueue.initNodes(SUnits);
ListScheduleTopDown();
@ -465,7 +461,7 @@ void SchedulePostRATDList::ReleaseSucc(SUnit *SU, SDep *SuccEdge) {
#ifndef NDEBUG
if (SuccSU->NumPredsLeft == 0) {
dbgs() << "*** Scheduling failed! ***\n";
SuccSU->dump(this);
dumpNode(*SuccSU);
dbgs() << " has been released too many times!\n";
llvm_unreachable(nullptr);
}
@ -502,7 +498,7 @@ void SchedulePostRATDList::ReleaseSuccessors(SUnit *SU) {
/// the Available queue.
void SchedulePostRATDList::ScheduleNodeTopDown(SUnit *SU, unsigned CurCycle) {
LLVM_DEBUG(dbgs() << "*** Scheduling [" << CurCycle << "]: ");
LLVM_DEBUG(SU->dump(this));
LLVM_DEBUG(dumpNode(*SU));
Sequence.push_back(SU);
assert(CurCycle >= SU->getDepth() &&

100
lib/CodeGen/ScheduleDAG.cpp
View File

@ -68,39 +68,36 @@ const MCInstrDesc *ScheduleDAG::getNodeDesc(const SDNode *Node) const {
return &TII->get(Node->getMachineOpcode());
}
LLVM_DUMP_METHOD
raw_ostream &SDep::print(raw_ostream &OS, const TargetRegisterInfo *TRI) const {
LLVM_DUMP_METHOD void SDep::dump(const TargetRegisterInfo *TRI) const {
switch (getKind()) {
case Data: OS << "Data"; break;
case Anti: OS << "Anti"; break;
case Output: OS << "Out "; break;
case Order: OS << "Ord "; break;
case Data: dbgs() << "Data"; break;
case Anti: dbgs() << "Anti"; break;
case Output: dbgs() << "Out "; break;
case Order: dbgs() << "Ord "; break;
}
switch (getKind()) {
case Data:
OS << " Latency=" << getLatency();
dbgs() << " Latency=" << getLatency();
if (TRI && isAssignedRegDep())
OS << " Reg=" << printReg(getReg(), TRI);
dbgs() << " Reg=" << printReg(getReg(), TRI);
break;
case Anti:
case Output:
OS << " Latency=" << getLatency();
dbgs() << " Latency=" << getLatency();
break;
case Order:
OS << " Latency=" << getLatency();
dbgs() << " Latency=" << getLatency();
switch(Contents.OrdKind) {
case Barrier: OS << " Barrier"; break;
case Barrier: dbgs() << " Barrier"; break;
case MayAliasMem:
case MustAliasMem: OS << " Memory"; break;
case Artificial: OS << " Artificial"; break;
case Weak: OS << " Weak"; break;
case Cluster: OS << " Cluster"; break;
case MustAliasMem: dbgs() << " Memory"; break;
case Artificial: dbgs() << " Artificial"; break;
case Weak: dbgs() << " Weak"; break;
case Cluster: dbgs() << " Cluster"; break;
}
break;
}
return OS;
}
bool SUnit::addPred(const SDep &D, bool Required) {
@ -337,33 +334,7 @@ void SUnit::biasCriticalPath() {
}
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
LLVM_DUMP_METHOD
raw_ostream &SUnit::print(raw_ostream &OS,
const SUnit *Entry, const SUnit *Exit) const {
if (this == Entry)
OS << "EntrySU";
else if (this == Exit)
OS << "ExitSU";
else
OS << "SU(" << NodeNum << ")";
return OS;
}
LLVM_DUMP_METHOD
raw_ostream &SUnit::print(raw_ostream &OS, const ScheduleDAG *G) const {
return print(OS, &G->EntrySU, &G->ExitSU);
}
LLVM_DUMP_METHOD
void SUnit::dump(const ScheduleDAG *G) const {
print(dbgs(), G);
dbgs() << ": ";
G->dumpNode(this);
}
LLVM_DUMP_METHOD void SUnit::dumpAll(const ScheduleDAG *G) const {
dump(G);
LLVM_DUMP_METHOD void SUnit::dumpAttributes() const {
dbgs() << " # preds left : " << NumPredsLeft << "\n";
dbgs() << " # succs left : " << NumSuccsLeft << "\n";
if (WeakPredsLeft)
@ -374,21 +345,38 @@ LLVM_DUMP_METHOD void SUnit::dumpAll(const ScheduleDAG *G) const {
dbgs() << " Latency : " << Latency << "\n";
dbgs() << " Depth : " << getDepth() << "\n";
dbgs() << " Height : " << getHeight() << "\n";
}
if (Preds.size() != 0) {
LLVM_DUMP_METHOD void ScheduleDAG::dumpNodeName(const SUnit &SU) const {
if (&SU == &EntrySU)
dbgs() << "EntrySU";
else if (&SU == &ExitSU)
dbgs() << "ExitSU";
else
dbgs() << "SU(" << SU.NodeNum << ")";
}
LLVM_DUMP_METHOD void ScheduleDAG::dumpNodeAll(const SUnit &SU) const {
dumpNode(SU);
SU.dumpAttributes();
if (SU.Preds.size() > 0) {
dbgs() << " Predecessors:\n";
for (const SDep &Dep : Preds) {
for (const SDep &Dep : SU.Preds) {
dbgs() << " ";
Dep.getSUnit()->print(dbgs(), G); dbgs() << ": ";
Dep.print(dbgs(), G->TRI); dbgs() << '\n';
dumpNodeName(*Dep.getSUnit());
dbgs() << ": ";
Dep.dump(TRI);
dbgs() << '\n';
}
}
if (Succs.size() != 0) {
if (SU.Succs.size() > 0) {
dbgs() << " Successors:\n";
for (const SDep &Dep : Succs) {
for (const SDep &Dep : SU.Succs) {
dbgs() << " ";
Dep.getSUnit()->print(dbgs(), G); dbgs() << ": ";
Dep.print(dbgs(), G->TRI); dbgs() << '\n';
dumpNodeName(*Dep.getSUnit());
dbgs() << ": ";
Dep.dump(TRI);
dbgs() << '\n';
}
}
}
@ -406,7 +394,7 @@ unsigned ScheduleDAG::VerifyScheduledDAG(bool isBottomUp) {
}
if (!AnyNotSched)
dbgs() << "*** Scheduling failed! ***\n";
SUnit.dump(this);
dumpNode(SUnit);
dbgs() << "has not been scheduled!\n";
AnyNotSched = true;
}
@ -415,7 +403,7 @@ unsigned ScheduleDAG::VerifyScheduledDAG(bool isBottomUp) {
unsigned(std::numeric_limits<int>::max())) {
if (!AnyNotSched)
dbgs() << "*** Scheduling failed! ***\n";
SUnit.dump(this);
dumpNode(SUnit);
dbgs() << "has an unexpected "
<< (isBottomUp ? "Height" : "Depth") << " value!\n";
AnyNotSched = true;
@ -424,7 +412,7 @@ unsigned ScheduleDAG::VerifyScheduledDAG(bool isBottomUp) {
if (SUnit.NumSuccsLeft != 0) {
if (!AnyNotSched)
dbgs() << "*** Scheduling failed! ***\n";
SUnit.dump(this);
dumpNode(SUnit);
dbgs() << "has successors left!\n";
AnyNotSched = true;
}
@ -432,7 +420,7 @@ unsigned ScheduleDAG::VerifyScheduledDAG(bool isBottomUp) {
if (SUnit.NumPredsLeft != 0) {
if (!AnyNotSched)
dbgs() << "*** Scheduling failed! ***\n";
SUnit.dump(this);
dumpNode(SUnit);
dbgs() << "has predecessors left!\n";
AnyNotSched = true;
}

18
lib/CodeGen/ScheduleDAGInstrs.cpp
View File

@ -1097,10 +1097,22 @@ void ScheduleDAGInstrs::fixupKills(MachineBasicBlock &MBB) {
}
}
void ScheduleDAGInstrs::dumpNode(const SUnit *SU) const {
// Cannot completely remove virtual function even in release mode.
void ScheduleDAGInstrs::dumpNode(const SUnit &SU) const {
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
SU->getInstr()->dump();
dumpNodeName(SU);
dbgs() << ": ";
SU.getInstr()->dump();
#endif
}
void ScheduleDAGInstrs::dump() const {
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
if (EntrySU.getInstr() != nullptr)
dumpNodeAll(EntrySU);
for (const SUnit &SU : SUnits)
dumpNodeAll(SU);
if (ExitSU.getInstr() != nullptr)
dumpNodeAll(ExitSU);
#endif
}

3
lib/CodeGen/ScoreboardHazardRecognizer.cpp
View File

@ -157,8 +157,7 @@ ScoreboardHazardRecognizer::getHazardType(SUnit *SU, int Stalls) {
if (!freeUnits) {
LLVM_DEBUG(dbgs() << "*** Hazard in cycle +" << StageCycle << ", ");
LLVM_DEBUG(dbgs() << "SU(" << SU->NodeNum << "): ");
LLVM_DEBUG(DAG->dumpNode(SU));
LLVM_DEBUG(DAG->dumpNode(*SU));
return Hazard;
}
}

7
lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp
View File

@ -125,8 +125,7 @@ void ScheduleDAGFast::Schedule() {
// Build the scheduling graph.
BuildSchedGraph(nullptr);
LLVM_DEBUG(for (unsigned su = 0, e = SUnits.size(); su != e; ++su) SUnits[su]
.dumpAll(this));
LLVM_DEBUG(dump());
// Execute the actual scheduling loop.
ListScheduleBottomUp();
@ -144,7 +143,7 @@ void ScheduleDAGFast::ReleasePred(SUnit *SU, SDep *PredEdge) {
#ifndef NDEBUG
if (PredSU->NumSuccsLeft == 0) {
dbgs() << "*** Scheduling failed! ***\n";
PredSU->dump(this);
dumpNode(*PredSU);
dbgs() << " has been released too many times!\n";
llvm_unreachable(nullptr);
}
@ -182,7 +181,7 @@ void ScheduleDAGFast::ReleasePredecessors(SUnit *SU, unsigned CurCycle) {
/// the Available queue.
void ScheduleDAGFast::ScheduleNodeBottomUp(SUnit *SU, unsigned CurCycle) {
LLVM_DEBUG(dbgs() << "*** Scheduling [" << CurCycle << "]: ");
LLVM_DEBUG(SU->dump(this));
LLVM_DEBUG(dumpNode(*SU));
assert(CurCycle >= SU->getHeight() && "Node scheduled below its height!");
SU->setHeightToAtLeast(CurCycle);

12
lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
View File

@ -365,7 +365,7 @@ void ScheduleDAGRRList::Schedule() {
// Build the scheduling graph.
BuildSchedGraph(nullptr);
LLVM_DEBUG(for (SUnit &SU : SUnits) SU.dumpAll(this));
LLVM_DEBUG(dump());
Topo.InitDAGTopologicalSorting();
AvailableQueue->initNodes(SUnits);
@ -396,7 +396,7 @@ void ScheduleDAGRRList::ReleasePred(SUnit *SU, const SDep *PredEdge) {
#ifndef NDEBUG
if (PredSU->NumSuccsLeft == 0) {
dbgs() << "*** Scheduling failed! ***\n";
PredSU->dump(this);
dumpNode(*PredSU);
dbgs() << " has been released too many times!\n";
llvm_unreachable(nullptr);
}
@ -729,7 +729,7 @@ static void resetVRegCycle(SUnit *SU);
/// the Available queue.
void ScheduleDAGRRList::ScheduleNodeBottomUp(SUnit *SU) {
LLVM_DEBUG(dbgs() << "\n*** Scheduling [" << CurCycle << "]: ");
LLVM_DEBUG(SU->dump(this));
LLVM_DEBUG(dumpNode(*SU));
#ifndef NDEBUG
if (CurCycle < SU->getHeight())
@ -828,7 +828,7 @@ void ScheduleDAGRRList::CapturePred(SDep *PredEdge) {
/// its predecessor states to reflect the change.
void ScheduleDAGRRList::UnscheduleNodeBottomUp(SUnit *SU) {
LLVM_DEBUG(dbgs() << "*** Unscheduling [" << SU->getHeight() << "]: ");
LLVM_DEBUG(SU->dump(this));
LLVM_DEBUG(dumpNode(*SU));
for (SDep &Pred : SU->Preds) {
CapturePred(&Pred);
@ -1130,7 +1130,7 @@ SUnit *ScheduleDAGRRList::CopyAndMoveSuccessors(SUnit *SU) {
return nullptr;
LLVM_DEBUG(dbgs() << "Considering duplicating the SU\n");
LLVM_DEBUG(SU->dump(this));
LLVM_DEBUG(dumpNode(*SU));
if (N->getGluedNode() &&
!TII->canCopyGluedNodeDuringSchedule(N)) {
@ -1888,7 +1888,7 @@ public:
while (!DumpQueue.empty()) {
SUnit *SU = popFromQueue(DumpQueue, DumpPicker, scheduleDAG);
dbgs() << "Height " << SU->getHeight() << ": ";
SU->dump(DAG);
DAG->dumpNode(*SU);
}
}
#endif

25
lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
View File

@ -648,18 +648,20 @@ void ScheduleDAGSDNodes::computeOperandLatency(SDNode *Def, SDNode *Use,
dep.setLatency(Latency);
}
void ScheduleDAGSDNodes::dumpNode(const SUnit *SU) const {
// Cannot completely remove virtual function even in release mode.
void ScheduleDAGSDNodes::dumpNode(const SUnit &SU) const {
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
if (!SU->getNode()) {
dumpNodeName(SU);
dbgs() << ": ";
if (!SU.getNode()) {
dbgs() << "PHYS REG COPY\n";
return;
}
SU->getNode()->dump(DAG);
SU.getNode()->dump(DAG);
dbgs() << "\n";
SmallVector<SDNode *, 4> GluedNodes;
for (SDNode *N = SU->getNode()->getGluedNode(); N; N = N->getGluedNode())
for (SDNode *N = SU.getNode()->getGluedNode(); N; N = N->getGluedNode())
GluedNodes.push_back(N);
while (!GluedNodes.empty()) {
dbgs() << " ";
@ -670,11 +672,22 @@ void ScheduleDAGSDNodes::dumpNode(const SUnit *SU) const {
#endif
}
void ScheduleDAGSDNodes::dump() const {
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
if (EntrySU.getNode() != nullptr)
dumpNodeAll(EntrySU);
for (const SUnit &SU : SUnits)
dumpNodeAll(SU);
if (ExitSU.getNode() != nullptr)
dumpNodeAll(ExitSU);
#endif
}
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
void ScheduleDAGSDNodes::dumpSchedule() const {
for (unsigned i = 0, e = Sequence.size(); i != e; i++) {
if (SUnit *SU = Sequence[i])
SU->dump(this);
dumpNode(*SU);
else
dbgs() << "**** NOOP ****\n";
}

4
lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.h
View File

@ -122,8 +122,8 @@ class InstrItineraryData;
virtual MachineBasicBlock*
EmitSchedule(MachineBasicBlock::iterator &InsertPos);
void dumpNode(const SUnit *SU) const override;
void dumpNode(const SUnit &SU) const override;
void dump() const override;
void dumpSchedule() const;
std::string getGraphNodeLabel(const SUnit *SU) const override;

4
lib/CodeGen/SelectionDAG/ScheduleDAGVLIW.cpp
View File

@ -118,7 +118,7 @@ void ScheduleDAGVLIW::releaseSucc(SUnit *SU, const SDep &D) {
#ifndef NDEBUG
if (SuccSU->NumPredsLeft == 0) {
dbgs() << "*** Scheduling failed! ***\n";
SuccSU->dump(this);
dumpNode(*SuccSU);
dbgs() << " has been released too many times!\n";
llvm_unreachable(nullptr);
}
@ -152,7 +152,7 @@ void ScheduleDAGVLIW::releaseSuccessors(SUnit *SU) {
/// the Available queue.
void ScheduleDAGVLIW::scheduleNodeTopDown(SUnit *SU, unsigned CurCycle) {
LLVM_DEBUG(dbgs() << "*** Scheduling [" << CurCycle << "]: ");
LLVM_DEBUG(SU->dump(this));
LLVM_DEBUG(dumpNode(*SU));
Sequence.push_back(SU);
assert(CurCycle >= SU->getDepth() && "Node scheduled above its depth!");

2
lib/Target/AMDGPU/GCNILPSched.cpp
View File

@ -335,7 +335,7 @@ GCNILPScheduler::schedule(ArrayRef<const SUnit*> BotRoots,
assert(C);
AvailQueue.remove(*C);
auto SU = C->SU;
LLVM_DEBUG(dbgs() << "Selected "; SU->dump(&DAG));
LLVM_DEBUG(dbgs() << "Selected "; DAG.dumpNode(*SU));
advanceToCycle(SU->getHeight());

2
lib/Target/AMDGPU/GCNMinRegStrategy.cpp
View File

@ -258,7 +258,7 @@ GCNMinRegScheduler::schedule(ArrayRef<const SUnit*> TopRoots,
assert(C);
RQ.remove(*C);
auto SU = C->SU;
LLVM_DEBUG(dbgs() << "Selected "; SU->dump(&DAG));
LLVM_DEBUG(dbgs() << "Selected "; DAG.dumpNode(*SU));
releaseSuccessors(SU, StepNo);
Schedule.push_back(SU);

8
lib/Target/AMDGPU/R600MachineScheduler.cpp
View File

@ -127,13 +127,13 @@ SUnit* R600SchedStrategy::pickNode(bool &IsTopNode) {
LLVM_DEBUG(if (SU) {
dbgs() << " ** Pick node **\n";
SU->dump(DAG);
DAG->dumpNode(*SU);
} else {
dbgs() << "NO NODE \n";
for (unsigned i = 0; i < DAG->SUnits.size(); i++) {
const SUnit &S = DAG->SUnits[i];
if (!S.isScheduled)
S.dump(DAG);
DAG->dumpNode(S);
}
});
@ -188,11 +188,11 @@ isPhysicalRegCopy(MachineInstr *MI) {
}
void R600SchedStrategy::releaseTopNode(SUnit *SU) {
LLVM_DEBUG(dbgs() << "Top Releasing "; SU->dump(DAG););
LLVM_DEBUG(dbgs() << "Top Releasing "; DAG->dumpNode(*SU));
}
void R600SchedStrategy::releaseBottomNode(SUnit *SU) {
LLVM_DEBUG(dbgs() << "Bottom Releasing "; SU->dump(DAG););
LLVM_DEBUG(dbgs() << "Bottom Releasing "; DAG->dumpNode(*SU));
if (isPhysicalRegCopy(SU->getInstr())) {
PhysicalRegCopy.push_back(SU);
return;

14
lib/Target/AMDGPU/SIMachineScheduler.cpp
View File

@ -471,7 +471,7 @@ void SIScheduleBlock::releaseSucc(SUnit *SU, SDep *SuccEdge) {
#ifndef NDEBUG
if (SuccSU->NumPredsLeft == 0) {
dbgs() << "*** Scheduling failed! ***\n";
SuccSU->dump(DAG);
DAG->dumpNode(*SuccSU);
dbgs() << " has been released too many times!\n";
llvm_unreachable(nullptr);
}
@ -611,13 +611,11 @@ void SIScheduleBlock::printDebug(bool full) {
dbgs() << "\nInstructions:\n";
if (!Scheduled) {
for (SUnit* SU : SUnits) {
SU->dump(DAG);
}
for (const SUnit* SU : SUnits)
DAG->dumpNode(*SU);
} else {
for (SUnit* SU : SUnits) {
SU->dump(DAG);
}
for (const SUnit* SU : SUnits)
DAG->dumpNode(*SU);
}
dbgs() << "///////////////////////\n";
@ -1933,7 +1931,7 @@ void SIScheduleDAGMI::schedule()
LLVM_DEBUG(dbgs() << "Preparing Scheduling\n");
buildDAGWithRegPressure();
LLVM_DEBUG(for (SUnit &SU : SUnits) SU.dumpAll(this));
LLVM_DEBUG(dump());
topologicalSort();
findRootsAndBiasEdges(TopRoots, BotRoots);

7
lib/Target/Hexagon/HexagonMachineScheduler.cpp
View File

@ -215,8 +215,7 @@ void VLIWMachineScheduler::schedule() {
++su) if (SUnits[su].getDepth() > maxD) maxD =
SUnits[su].getDepth();
dbgs() << "Max Depth " << maxD << "\n";);
LLVM_DEBUG(for (unsigned su = 0, e = SUnits.size(); su != e; ++su) SUnits[su]
.dumpAll(this));
LLVM_DEBUG(dump());
initQueues(TopRoots, BotRoots);
@ -489,7 +488,7 @@ void ConvergingVLIWScheduler::traceCandidate(const char *Label,
else
dbgs() << " ";
dbgs() << "cost(" << Cost << ")\t";
SU->dump(DAG);
DAG->dumpNode(*SU);
}
// Very detailed queue dump, to be used with higher verbosity levels.
@ -982,7 +981,7 @@ SUnit *ConvergingVLIWScheduler::pickNode(bool &IsTopNode) {
<< " Scheduling instruction in cycle "
<< (IsTopNode ? Top.CurrCycle : Bot.CurrCycle) << " ("
<< reportPackets() << ")\n";
SU->dump(DAG));
DAG->dumpNode(*SU));
return SU;
}

5
lib/Target/PowerPC/PPCHazardRecognizers.cpp
View File

@ -180,9 +180,8 @@ void PPCDispatchGroupSBHazardRecognizer::EmitInstruction(SUnit *SU) {
CurGroup.clear();
CurSlots = CurBranches = 0;
} else {
LLVM_DEBUG(dbgs() << "**** Adding to dispatch group: SU(" << SU->NodeNum
<< "): ");
LLVM_DEBUG(DAG->dumpNode(SU));
LLVM_DEBUG(dbgs() << "**** Adding to dispatch group: ");
LLVM_DEBUG(DAG->dumpNode(*SU));
unsigned NSlots;
bool MustBeFirst = mustComeFirst(MCID, NSlots);