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Add a isPositionIndependent predicate.
Reduces a bit of code duplication and clarify where we are interested just on position independence and no the location of the symbol. llvm-svn: 273164
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@ -1564,6 +1564,10 @@ void ARMTargetLowering::PassF64ArgInRegs(const SDLoc &dl, SelectionDAG &DAG,
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}
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}
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bool ARMTargetLowering::isPositionIndependent() const {
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return getTargetMachine().getRelocationModel() == Reloc::PIC_;
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}
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/// LowerCall - Lowering a call into a callseq_start <-
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/// ARMISD:CALL <- callseq_end chain. Also add input and output parameter
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/// nodes.
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@ -1813,9 +1817,8 @@ ARMTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
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auto PtrVt = getPointerTy(DAG.getDataLayout());
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if (Subtarget->genLongCalls()) {
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assert((Subtarget->isTargetWindows() ||
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RM == Reloc::Static) &&
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"long-calls with non-static relocation model!");
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assert(!isPositionIndependent() &&
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"long-calls codegen is not position independent!");
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// Handle a global address or an external symbol. If it's not one of
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// those, the target's already in a register, so we don't need to do
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// anything extra.
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@ -2516,9 +2519,9 @@ SDValue ARMTargetLowering::LowerBlockAddress(SDValue Op,
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SDLoc DL(Op);
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EVT PtrVT = getPointerTy(DAG.getDataLayout());
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const BlockAddress *BA = cast<BlockAddressSDNode>(Op)->getBlockAddress();
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Reloc::Model RelocM = getTargetMachine().getRelocationModel();
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SDValue CPAddr;
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if (RelocM == Reloc::Static) {
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bool IsPositionIndependent = isPositionIndependent();
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if (!IsPositionIndependent) {
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CPAddr = DAG.getTargetConstantPool(BA, PtrVT, 4);
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} else {
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unsigned PCAdj = Subtarget->isThumb() ? 4 : 8;
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@ -2533,7 +2536,7 @@ SDValue ARMTargetLowering::LowerBlockAddress(SDValue Op,
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DAG.getLoad(PtrVT, DL, DAG.getEntryNode(), CPAddr,
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MachinePointerInfo::getConstantPool(DAG.getMachineFunction()),
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false, false, false, 0);
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if (RelocM == Reloc::Static)
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if (!IsPositionIndependent)
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return Result;
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SDValue PICLabel = DAG.getConstant(ARMPCLabelIndex, DL, MVT::i32);
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return DAG.getNode(ARMISD::PIC_ADD, DL, PtrVT, Result, PICLabel);
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@ -2798,7 +2801,7 @@ SDValue ARMTargetLowering::LowerGlobalAddressELF(SDValue Op,
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const TargetMachine &TM = getTargetMachine();
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Reloc::Model RM = TM.getRelocationModel();
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const Triple &TargetTriple = TM.getTargetTriple();
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if (RM == Reloc::PIC_) {
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if (isPositionIndependent()) {
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bool UseGOT_PREL =
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!shouldAssumeDSOLocal(RM, TargetTriple, *GV->getParent(), GV);
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@ -2851,7 +2854,6 @@ SDValue ARMTargetLowering::LowerGlobalAddressDarwin(SDValue Op,
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EVT PtrVT = getPointerTy(DAG.getDataLayout());
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SDLoc dl(Op);
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const GlobalValue *GV = cast<GlobalAddressSDNode>(Op)->getGlobal();
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Reloc::Model RelocM = getTargetMachine().getRelocationModel();
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if (Subtarget->useMovt(DAG.getMachineFunction()))
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++NumMovwMovt;
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@ -2859,11 +2861,12 @@ SDValue ARMTargetLowering::LowerGlobalAddressDarwin(SDValue Op,
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// FIXME: Once remat is capable of dealing with instructions with register
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// operands, expand this into multiple nodes
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unsigned Wrapper =
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RelocM == Reloc::PIC_ ? ARMISD::WrapperPIC : ARMISD::Wrapper;
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isPositionIndependent() ? ARMISD::WrapperPIC : ARMISD::Wrapper;
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SDValue G = DAG.getTargetGlobalAddress(GV, dl, PtrVT, 0, ARMII::MO_NONLAZY);
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SDValue Result = DAG.getNode(Wrapper, dl, PtrVT, G);
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Reloc::Model RelocM = getTargetMachine().getRelocationModel();
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if (Subtarget->GVIsIndirectSymbol(GV, RelocM))
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Result = DAG.getLoad(PtrVT, dl, DAG.getEntryNode(), Result,
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MachinePointerInfo::getGOT(DAG.getMachineFunction()),
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@ -2942,10 +2945,9 @@ ARMTargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG,
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ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>();
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unsigned ARMPCLabelIndex = AFI->createPICLabelUId();
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EVT PtrVT = getPointerTy(DAG.getDataLayout());
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Reloc::Model RelocM = getTargetMachine().getRelocationModel();
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SDValue CPAddr;
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unsigned PCAdj = (RelocM != Reloc::PIC_)
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? 0 : (Subtarget->isThumb() ? 4 : 8);
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bool IsPositionIndependent = isPositionIndependent();
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unsigned PCAdj = IsPositionIndependent ? (Subtarget->isThumb() ? 4 : 8) : 0;
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ARMConstantPoolValue *CPV =
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ARMConstantPoolConstant::Create(MF.getFunction(), ARMPCLabelIndex,
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ARMCP::CPLSDA, PCAdj);
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@ -2956,7 +2958,7 @@ ARMTargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG,
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MachinePointerInfo::getConstantPool(DAG.getMachineFunction()), false,
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false, false, 0);
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if (RelocM == Reloc::PIC_) {
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if (IsPositionIndependent) {
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SDValue PICLabel = DAG.getConstant(ARMPCLabelIndex, dl, MVT::i32);
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Result = DAG.getNode(ARMISD::PIC_ADD, dl, PtrVT, Result, PICLabel);
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}
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@ -4001,7 +4003,7 @@ SDValue ARMTargetLowering::LowerBR_JT(SDValue Op, SelectionDAG &DAG) const {
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return DAG.getNode(ARMISD::BR2_JT, dl, MVT::Other, Chain,
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Addr, Op.getOperand(2), JTI);
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}
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if (getTargetMachine().getRelocationModel() == Reloc::PIC_) {
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if (isPositionIndependent()) {
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Addr =
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DAG.getLoad((EVT)MVT::i32, dl, Chain, Addr,
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MachinePointerInfo::getJumpTable(DAG.getMachineFunction()),
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@ -7325,7 +7327,6 @@ void ARMTargetLowering::EmitSjLjDispatchBlock(MachineInstr *MI,
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MachineJumpTableInfo *JTI =
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MF->getOrCreateJumpTableInfo(MachineJumpTableInfo::EK_Inline);
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unsigned MJTI = JTI->createJumpTableIndex(LPadList);
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Reloc::Model RelocM = getTargetMachine().getRelocationModel();
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// Create the MBBs for the dispatch code.
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@ -7369,6 +7370,7 @@ void ARMTargetLowering::EmitSjLjDispatchBlock(MachineInstr *MI,
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// registers being marked as clobbered.
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MIB.addRegMask(RI.getNoPreservedMask());
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bool IsPositionIndependent = isPositionIndependent();
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unsigned NumLPads = LPadList.size();
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if (Subtarget->isThumb2()) {
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unsigned NewVReg1 = MRI->createVirtualRegister(TRC);
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@ -7482,7 +7484,7 @@ void ARMTargetLowering::EmitSjLjDispatchBlock(MachineInstr *MI,
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.addMemOperand(JTMMOLd));
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unsigned NewVReg6 = NewVReg5;
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if (RelocM == Reloc::PIC_) {
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if (IsPositionIndependent) {
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NewVReg6 = MRI->createVirtualRegister(TRC);
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AddDefaultPred(BuildMI(DispContBB, dl, TII->get(ARM::tADDrr), NewVReg6)
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.addReg(ARM::CPSR, RegState::Define)
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@ -7565,7 +7567,7 @@ void ARMTargetLowering::EmitSjLjDispatchBlock(MachineInstr *MI,
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.addImm(0)
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.addMemOperand(JTMMOLd));
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if (RelocM == Reloc::PIC_) {
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if (IsPositionIndependent) {
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BuildMI(DispContBB, dl, TII->get(ARM::BR_JTadd))
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.addReg(NewVReg5, RegState::Kill)
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.addReg(NewVReg4)
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@ -227,6 +227,7 @@ namespace llvm {
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explicit ARMTargetLowering(const TargetMachine &TM,
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const ARMSubtarget &STI);
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bool isPositionIndependent() const;
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unsigned getJumpTableEncoding() const override;
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bool useSoftFloat() const override;
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