From 9818b760a93fc38c79394d1894c4f50da6e74fed Mon Sep 17 00:00:00 2001
From: Sanjay Patel <spatel@rotateright.com>
Date: Tue, 31 Dec 2019 10:25:41 -0500
Subject: [PATCH] [AArch64] add test for fsub+fneg; NFC

D72015 proposes to restrict the current behavior.
---
 test/CodeGen/AArch64/arm64-fp.ll | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/test/CodeGen/AArch64/arm64-fp.ll b/test/CodeGen/AArch64/arm64-fp.ll
index 683177a8d48..cf8b90de130 100644
--- a/test/CodeGen/AArch64/arm64-fp.ll
+++ b/test/CodeGen/AArch64/arm64-fp.ll
@@ -34,3 +34,19 @@ define double @negation_propagation(double* %arg, double %arg1, double %arg2) {
   %t18 = fadd double %t16, %t7
   ret double %t18
 }
+
+define { double, double } @testfn(double %x, double %y) #0 {
+; CHECK-LABEL: testfn:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    fsub d2, d0, d1
+; CHECK-NEXT:    fsub d1, d1, d0
+; CHECK-NEXT:    mov v0.16b, v2.16b
+; CHECK-NEXT:    ret
+  %sub = fsub fast double %x, %y
+  %neg = fneg fast double %sub
+  %r0 = insertvalue { double, double } undef, double %sub, 0
+  %r1 = insertvalue { double, double } %r0, double %neg, 1
+  ret { double, double } %r1
+}
+
+attributes #0 = { "no-signed-zeros-fp-math"="true" }