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[SelectionDAG] Pull out repeated Op.getOpcode(). NFCI.
llvm-svn: 325253
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cc96981b3a
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@ -3054,7 +3054,8 @@ unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, const APInt &DemandedElts,
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if (!DemandedElts)
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if (!DemandedElts)
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return 1; // No demanded elts, better to assume we don't know anything.
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return 1; // No demanded elts, better to assume we don't know anything.
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switch (Op.getOpcode()) {
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unsigned Opcode = Op.getOpcode();
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switch (Opcode) {
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default: break;
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default: break;
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case ISD::AssertSext:
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case ISD::AssertSext:
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Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
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Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
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@ -3241,7 +3242,7 @@ unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, const APInt &DemandedElts,
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unsigned RotAmt = C->getAPIntValue().urem(VTBits);
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unsigned RotAmt = C->getAPIntValue().urem(VTBits);
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// Handle rotate right by N like a rotate left by 32-N.
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// Handle rotate right by N like a rotate left by 32-N.
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if (Op.getOpcode() == ISD::ROTR)
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if (Opcode == ISD::ROTR)
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RotAmt = (VTBits - RotAmt) % VTBits;
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RotAmt = (VTBits - RotAmt) % VTBits;
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// If we aren't rotating out all of the known-in sign bits, return the
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// If we aren't rotating out all of the known-in sign bits, return the
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@ -3439,10 +3440,10 @@ unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, const APInt &DemandedElts,
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}
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}
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// Allow the target to implement this method for its nodes.
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// Allow the target to implement this method for its nodes.
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if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
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if (Opcode >= ISD::BUILTIN_OP_END ||
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Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
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Opcode == ISD::INTRINSIC_WO_CHAIN ||
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Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
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Opcode == ISD::INTRINSIC_W_CHAIN ||
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Op.getOpcode() == ISD::INTRINSIC_VOID) {
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Opcode == ISD::INTRINSIC_VOID) {
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unsigned NumBits =
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unsigned NumBits =
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TLI->ComputeNumSignBitsForTargetNode(Op, DemandedElts, *this, Depth);
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TLI->ComputeNumSignBitsForTargetNode(Op, DemandedElts, *this, Depth);
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if (NumBits > 1)
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if (NumBits > 1)
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