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https://github.com/RPCS3/llvm-mirror.git
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DebugLoc propagation. Done with file.
llvm-svn: 63486
This commit is contained in:
Dale Johannesen
parent
fe9622a384
commit
98a9d2534b
@ -36,6 +36,7 @@ void DAGTypeLegalizer::ExpandRes_BIT_CONVERT(SDNode *N, SDValue &Lo,
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MVT NOutVT = TLI.getTypeToTransformTo(OutVT);
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SDValue InOp = N->getOperand(0);
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MVT InVT = InOp.getValueType();
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DebugLoc dl = N->getDebugLoc();
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// Handle some special cases efficiently.
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switch (getTypeAction(InVT)) {
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@ -47,15 +48,15 @@ void DAGTypeLegalizer::ExpandRes_BIT_CONVERT(SDNode *N, SDValue &Lo,
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case SoftenFloat:
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// Convert the integer operand instead.
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SplitInteger(GetSoftenedFloat(InOp), Lo, Hi);
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Lo = DAG.getNode(ISD::BIT_CONVERT, NOutVT, Lo);
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Hi = DAG.getNode(ISD::BIT_CONVERT, NOutVT, Hi);
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Lo = DAG.getNode(ISD::BIT_CONVERT, dl, NOutVT, Lo);
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Hi = DAG.getNode(ISD::BIT_CONVERT, dl, NOutVT, Hi);
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return;
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case ExpandInteger:
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case ExpandFloat:
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// Convert the expanded pieces of the input.
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GetExpandedOp(InOp, Lo, Hi);
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Lo = DAG.getNode(ISD::BIT_CONVERT, NOutVT, Lo);
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Hi = DAG.getNode(ISD::BIT_CONVERT, NOutVT, Hi);
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Lo = DAG.getNode(ISD::BIT_CONVERT, dl, NOutVT, Lo);
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Hi = DAG.getNode(ISD::BIT_CONVERT, dl, NOutVT, Hi);
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return;
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case SplitVector:
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// Convert the split parts of the input if it was split in two.
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@ -63,16 +64,16 @@ void DAGTypeLegalizer::ExpandRes_BIT_CONVERT(SDNode *N, SDValue &Lo,
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if (Lo.getValueType() == Hi.getValueType()) {
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if (TLI.isBigEndian())
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std::swap(Lo, Hi);
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Lo = DAG.getNode(ISD::BIT_CONVERT, NOutVT, Lo);
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Hi = DAG.getNode(ISD::BIT_CONVERT, NOutVT, Hi);
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Lo = DAG.getNode(ISD::BIT_CONVERT, dl, NOutVT, Lo);
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Hi = DAG.getNode(ISD::BIT_CONVERT, dl, NOutVT, Hi);
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return;
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}
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break;
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case ScalarizeVector:
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// Convert the element instead.
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SplitInteger(BitConvertToInteger(GetScalarizedVector(InOp)), Lo, Hi);
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Lo = DAG.getNode(ISD::BIT_CONVERT, NOutVT, Lo);
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Hi = DAG.getNode(ISD::BIT_CONVERT, NOutVT, Hi);
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Lo = DAG.getNode(ISD::BIT_CONVERT, dl, NOutVT, Lo);
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Hi = DAG.getNode(ISD::BIT_CONVERT, dl, NOutVT, Hi);
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return;
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}
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@ -88,18 +89,18 @@ void DAGTypeLegalizer::ExpandRes_BIT_CONVERT(SDNode *N, SDValue &Lo,
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const Value *SV = PseudoSourceValue::getFixedStack(SPFI);
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// Emit a store to the stack slot.
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SDValue Store = DAG.getStore(DAG.getEntryNode(), InOp, StackPtr, SV, 0);
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SDValue Store = DAG.getStore(DAG.getEntryNode(), dl, InOp, StackPtr, SV, 0);
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// Load the first half from the stack slot.
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Lo = DAG.getLoad(NOutVT, Store, StackPtr, SV, 0);
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Lo = DAG.getLoad(NOutVT, dl, Store, StackPtr, SV, 0);
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// Increment the pointer to the other half.
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unsigned IncrementSize = NOutVT.getSizeInBits() / 8;
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StackPtr = DAG.getNode(ISD::ADD, StackPtr.getValueType(), StackPtr,
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StackPtr = DAG.getNode(ISD::ADD, dl, StackPtr.getValueType(), StackPtr,
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DAG.getIntPtrConstant(IncrementSize));
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// Load the second half from the stack slot.
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Hi = DAG.getLoad(NOutVT, Store, StackPtr, SV, IncrementSize, false,
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Hi = DAG.getLoad(NOutVT, dl, Store, StackPtr, SV, IncrementSize, false,
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MinAlign(Alignment, IncrementSize));
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// Handle endianness of the load.
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@ -119,14 +120,15 @@ void DAGTypeLegalizer::ExpandRes_EXTRACT_ELEMENT(SDNode *N, SDValue &Lo,
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GetExpandedOp(N->getOperand(0), Lo, Hi);
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SDValue Part = cast<ConstantSDNode>(N->getOperand(1))->getZExtValue() ?
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Hi : Lo;
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DebugLoc dl = N->getDebugLoc();
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assert(Part.getValueType() == N->getValueType(0) &&
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"Type twice as big as expanded type not itself expanded!");
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MVT NVT = TLI.getTypeToTransformTo(N->getValueType(0));
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Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, NVT, Part,
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Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, NVT, Part,
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DAG.getConstant(0, TLI.getPointerTy()));
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Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, NVT, Part,
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Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, NVT, Part,
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DAG.getConstant(1, TLI.getPointerTy()));
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}
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@ -134,13 +136,14 @@ void DAGTypeLegalizer::ExpandRes_EXTRACT_VECTOR_ELT(SDNode *N, SDValue &Lo,
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SDValue &Hi) {
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SDValue OldVec = N->getOperand(0);
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unsigned OldElts = OldVec.getValueType().getVectorNumElements();
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DebugLoc dl = N->getDebugLoc();
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// Convert to a vector of the expanded element type, for example
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// <3 x i64> -> <6 x i32>.
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MVT OldVT = N->getValueType(0);
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MVT NewVT = TLI.getTypeToTransformTo(OldVT);
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SDValue NewVec = DAG.getNode(ISD::BIT_CONVERT,
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SDValue NewVec = DAG.getNode(ISD::BIT_CONVERT, dl,
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MVT::getVectorVT(NewVT, 2*OldElts),
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OldVec);
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@ -149,14 +152,14 @@ void DAGTypeLegalizer::ExpandRes_EXTRACT_VECTOR_ELT(SDNode *N, SDValue &Lo,
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// Make sure the type of Idx is big enough to hold the new values.
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if (Idx.getValueType().bitsLT(TLI.getPointerTy()))
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Idx = DAG.getNode(ISD::ZERO_EXTEND, TLI.getPointerTy(), Idx);
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Idx = DAG.getNode(ISD::ZERO_EXTEND, dl, TLI.getPointerTy(), Idx);
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Idx = DAG.getNode(ISD::ADD, Idx.getValueType(), Idx, Idx);
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Lo = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, NewVT, NewVec, Idx);
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Lo = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, NewVT, NewVec, Idx);
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Idx = DAG.getNode(ISD::ADD, Idx.getValueType(), Idx,
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Idx = DAG.getNode(ISD::ADD, dl, Idx.getValueType(), Idx,
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DAG.getConstant(1, Idx.getValueType()));
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Hi = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, NewVT, NewVec, Idx);
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Hi = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, NewVT, NewVec, Idx);
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if (TLI.isBigEndian())
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std::swap(Lo, Hi);
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@ -165,6 +168,7 @@ void DAGTypeLegalizer::ExpandRes_EXTRACT_VECTOR_ELT(SDNode *N, SDValue &Lo,
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void DAGTypeLegalizer::ExpandRes_NormalLoad(SDNode *N, SDValue &Lo,
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SDValue &Hi) {
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assert(ISD::isNormalLoad(N) && "This routine only for normal loads!");
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DebugLoc dl = N->getDebugLoc();
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LoadSDNode *LD = cast<LoadSDNode>(N);
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MVT NVT = TLI.getTypeToTransformTo(LD->getValueType(0));
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@ -176,19 +180,20 @@ void DAGTypeLegalizer::ExpandRes_NormalLoad(SDNode *N, SDValue &Lo,
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assert(NVT.isByteSized() && "Expanded type not byte sized!");
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Lo = DAG.getLoad(NVT, Chain, Ptr, LD->getSrcValue(), SVOffset,
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Lo = DAG.getLoad(NVT, dl, Chain, Ptr, LD->getSrcValue(), SVOffset,
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isVolatile, Alignment);
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// Increment the pointer to the other half.
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unsigned IncrementSize = NVT.getSizeInBits() / 8;
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Ptr = DAG.getNode(ISD::ADD, Ptr.getValueType(), Ptr,
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Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr,
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DAG.getIntPtrConstant(IncrementSize));
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Hi = DAG.getLoad(NVT, Chain, Ptr, LD->getSrcValue(), SVOffset+IncrementSize,
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Hi = DAG.getLoad(NVT, dl, Chain, Ptr, LD->getSrcValue(),
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SVOffset+IncrementSize,
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isVolatile, MinAlign(Alignment, IncrementSize));
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// Build a factor node to remember that this load is independent of the
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// other one.
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Chain = DAG.getNode(ISD::TokenFactor, MVT::Other, Lo.getValue(1),
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Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Lo.getValue(1),
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Hi.getValue(1));
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// Handle endianness of the load.
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@ -223,6 +228,7 @@ void DAGTypeLegalizer::ExpandRes_VAARG(SDNode *N, SDValue &Lo, SDValue &Hi) {
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//===--------------------------------------------------------------------===//
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SDValue DAGTypeLegalizer::ExpandOp_BIT_CONVERT(SDNode *N) {
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DebugLoc dl = N->getDebugLoc();
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if (N->getValueType(0).isVector()) {
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// An illegal expanding type is being converted to a legal vector type.
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// Make a two element vector out of the expanded parts and convert that
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@ -239,8 +245,8 @@ SDValue DAGTypeLegalizer::ExpandOp_BIT_CONVERT(SDNode *N) {
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if (TLI.isBigEndian())
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std::swap(Parts[0], Parts[1]);
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SDValue Vec = DAG.getNode(ISD::BUILD_VECTOR, NVT, Parts, 2);
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return DAG.getNode(ISD::BIT_CONVERT, N->getValueType(0), Vec);
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SDValue Vec = DAG.getNode(ISD::BUILD_VECTOR, dl, NVT, Parts, 2);
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return DAG.getNode(ISD::BIT_CONVERT, dl, N->getValueType(0), Vec);
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}
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}
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@ -254,6 +260,7 @@ SDValue DAGTypeLegalizer::ExpandOp_BUILD_VECTOR(SDNode *N) {
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unsigned NumElts = VecVT.getVectorNumElements();
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MVT OldVT = N->getOperand(0).getValueType();
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MVT NewVT = TLI.getTypeToTransformTo(OldVT);
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DebugLoc dl = N->getDebugLoc();
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// Build a vector of twice the length out of the expanded elements.
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// For example <3 x i64> -> <6 x i32>.
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@ -269,12 +276,12 @@ SDValue DAGTypeLegalizer::ExpandOp_BUILD_VECTOR(SDNode *N) {
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NewElts.push_back(Hi);
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}
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SDValue NewVec = DAG.getNode(ISD::BUILD_VECTOR,
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SDValue NewVec = DAG.getNode(ISD::BUILD_VECTOR, dl,
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MVT::getVectorVT(NewVT, NewElts.size()),
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&NewElts[0], NewElts.size());
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// Convert the new vector to the old vector type.
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return DAG.getNode(ISD::BIT_CONVERT, VecVT, NewVec);
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return DAG.getNode(ISD::BIT_CONVERT, dl, VecVT, NewVec);
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}
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SDValue DAGTypeLegalizer::ExpandOp_EXTRACT_ELEMENT(SDNode *N) {
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@ -287,6 +294,7 @@ SDValue DAGTypeLegalizer::ExpandOp_INSERT_VECTOR_ELT(SDNode *N) {
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// The vector type is legal but the element type needs expansion.
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MVT VecVT = N->getValueType(0);
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unsigned NumElts = VecVT.getVectorNumElements();
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DebugLoc dl = N->getDebugLoc();
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SDValue Val = N->getOperand(1);
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MVT OldEVT = Val.getValueType();
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@ -298,7 +306,8 @@ SDValue DAGTypeLegalizer::ExpandOp_INSERT_VECTOR_ELT(SDNode *N) {
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// Bitconvert to a vector of twice the length with elements of the expanded
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// type, insert the expanded vector elements, and then convert back.
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MVT NewVecVT = MVT::getVectorVT(NewEVT, NumElts*2);
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SDValue NewVec = DAG.getNode(ISD::BIT_CONVERT, NewVecVT, N->getOperand(0));
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SDValue NewVec = DAG.getNode(ISD::BIT_CONVERT, dl,
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NewVecVT, N->getOperand(0));
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SDValue Lo, Hi;
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GetExpandedOp(Val, Lo, Hi);
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@ -306,29 +315,32 @@ SDValue DAGTypeLegalizer::ExpandOp_INSERT_VECTOR_ELT(SDNode *N) {
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std::swap(Lo, Hi);
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SDValue Idx = N->getOperand(2);
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Idx = DAG.getNode(ISD::ADD, Idx.getValueType(), Idx, Idx);
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NewVec = DAG.getNode(ISD::INSERT_VECTOR_ELT, NewVecVT, NewVec, Lo, Idx);
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Idx = DAG.getNode(ISD::ADD,Idx.getValueType(), Idx, DAG.getIntPtrConstant(1));
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NewVec = DAG.getNode(ISD::INSERT_VECTOR_ELT, NewVecVT, NewVec, Hi, Idx);
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Idx = DAG.getNode(ISD::ADD, dl, Idx.getValueType(), Idx, Idx);
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NewVec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, NewVecVT, NewVec, Lo, Idx);
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Idx = DAG.getNode(ISD::ADD, dl,
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Idx.getValueType(), Idx, DAG.getIntPtrConstant(1));
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NewVec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, NewVecVT, NewVec, Hi, Idx);
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// Convert the new vector to the old vector type.
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return DAG.getNode(ISD::BIT_CONVERT, VecVT, NewVec);
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return DAG.getNode(ISD::BIT_CONVERT, dl, VecVT, NewVec);
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}
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SDValue DAGTypeLegalizer::ExpandOp_SCALAR_TO_VECTOR(SDNode *N) {
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DebugLoc dl = N->getDebugLoc();
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MVT VT = N->getValueType(0);
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unsigned NumElts = VT.getVectorNumElements();
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SmallVector<SDValue, 16> Ops(NumElts);
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Ops[0] = N->getOperand(0);
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SDValue UndefVal = DAG.getNode(ISD::UNDEF, Ops[0].getValueType());
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SDValue UndefVal = DAG.getNode(ISD::UNDEF, dl, Ops[0].getValueType());
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for (unsigned i = 1; i < NumElts; ++i)
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Ops[i] = UndefVal;
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return DAG.getNode(ISD::BUILD_VECTOR, VT, &Ops[0], NumElts);
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return DAG.getNode(ISD::BUILD_VECTOR, dl, VT, &Ops[0], NumElts);
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}
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SDValue DAGTypeLegalizer::ExpandOp_NormalStore(SDNode *N, unsigned OpNo) {
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assert(ISD::isNormalStore(N) && "This routine only for normal stores!");
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assert(OpNo == 1 && "Can only expand the stored value so far");
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DebugLoc dl = N->getDebugLoc();
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StoreSDNode *St = cast<StoreSDNode>(N);
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MVT NVT = TLI.getTypeToTransformTo(St->getValue().getValueType());
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@ -347,16 +359,17 @@ SDValue DAGTypeLegalizer::ExpandOp_NormalStore(SDNode *N, unsigned OpNo) {
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if (TLI.isBigEndian())
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std::swap(Lo, Hi);
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Lo = DAG.getStore(Chain, Lo, Ptr, St->getSrcValue(), SVOffset,
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Lo = DAG.getStore(Chain, dl, Lo, Ptr, St->getSrcValue(), SVOffset,
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isVolatile, Alignment);
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Ptr = DAG.getNode(ISD::ADD, Ptr.getValueType(), Ptr,
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Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr,
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DAG.getIntPtrConstant(IncrementSize));
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assert(isTypeLegal(Ptr.getValueType()) && "Pointers must be legal!");
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Hi = DAG.getStore(Chain, Hi, Ptr, St->getSrcValue(), SVOffset + IncrementSize,
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Hi = DAG.getStore(Chain, dl, Hi, Ptr, St->getSrcValue(),
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SVOffset + IncrementSize,
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isVolatile, MinAlign(Alignment, IncrementSize));
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return DAG.getNode(ISD::TokenFactor, MVT::Other, Lo, Hi);
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return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Lo, Hi);
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}
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@ -393,29 +406,32 @@ void DAGTypeLegalizer::SplitRes_MERGE_VALUES(SDNode *N,
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void DAGTypeLegalizer::SplitRes_SELECT(SDNode *N, SDValue &Lo,
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SDValue &Hi) {
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SDValue LL, LH, RL, RH;
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DebugLoc dl = N->getDebugLoc();
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GetSplitOp(N->getOperand(1), LL, LH);
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GetSplitOp(N->getOperand(2), RL, RH);
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SDValue Cond = N->getOperand(0);
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Lo = DAG.getNode(ISD::SELECT, LL.getValueType(), Cond, LL, RL);
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Hi = DAG.getNode(ISD::SELECT, LH.getValueType(), Cond, LH, RH);
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Lo = DAG.getNode(ISD::SELECT, dl, LL.getValueType(), Cond, LL, RL);
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Hi = DAG.getNode(ISD::SELECT, dl, LH.getValueType(), Cond, LH, RH);
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}
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void DAGTypeLegalizer::SplitRes_SELECT_CC(SDNode *N, SDValue &Lo,
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SDValue &Hi) {
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SDValue LL, LH, RL, RH;
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DebugLoc dl = N->getDebugLoc();
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GetSplitOp(N->getOperand(2), LL, LH);
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GetSplitOp(N->getOperand(3), RL, RH);
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Lo = DAG.getNode(ISD::SELECT_CC, LL.getValueType(), N->getOperand(0),
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Lo = DAG.getNode(ISD::SELECT_CC, dl, LL.getValueType(), N->getOperand(0),
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N->getOperand(1), LL, RL, N->getOperand(4));
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Hi = DAG.getNode(ISD::SELECT_CC, LH.getValueType(), N->getOperand(0),
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Hi = DAG.getNode(ISD::SELECT_CC, dl, LH.getValueType(), N->getOperand(0),
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N->getOperand(1), LH, RH, N->getOperand(4));
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}
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void DAGTypeLegalizer::SplitRes_UNDEF(SDNode *N, SDValue &Lo, SDValue &Hi) {
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MVT LoVT, HiVT;
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DebugLoc dl = N->getDebugLoc();
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GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
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Lo = DAG.getNode(ISD::UNDEF, LoVT);
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Hi = DAG.getNode(ISD::UNDEF, HiVT);
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Lo = DAG.getNode(ISD::UNDEF, dl, LoVT);
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Hi = DAG.getNode(ISD::UNDEF, dl, HiVT);
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}
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