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[IR] add/use isIntDivRem convenience function

There are more existing potential users of this,
but I've limited this patch to the first couple
that I found to minimize typo risk.

llvm-svn: 335157
This commit is contained in:
Sanjay Patel 2018-06-20 19:02:17 +00:00
parent 7b453f02d1
commit 98e2405ef3
3 changed files with 7 additions and 6 deletions

View File

@ -128,6 +128,7 @@ public:
const char *getOpcodeName() const { return getOpcodeName(getOpcode()); }
bool isTerminator() const { return isTerminator(getOpcode()); }
bool isBinaryOp() const { return isBinaryOp(getOpcode()); }
bool isIntDivRem() const { return isIntDivRem(getOpcode()); }
bool isShift() { return isShift(getOpcode()); }
bool isCast() const { return isCast(getOpcode()); }
bool isFuncletPad() const { return isFuncletPad(getOpcode()); }
@ -142,6 +143,10 @@ public:
return Opcode >= BinaryOpsBegin && Opcode < BinaryOpsEnd;
}
static inline bool isIntDivRem(unsigned Opcode) {
return Opcode == UDiv || Opcode == SDiv || Opcode == URem || Opcode == SRem;
}
/// Determine if the Opcode is one of the shift instructions.
static inline bool isShift(unsigned Opcode) {
return Opcode >= Shl && Opcode <= AShr;

View File

@ -1227,9 +1227,7 @@ Constant *llvm::ConstantFoldBinaryInstruction(unsigned Opcode,
Constant *RHS = ConstantExpr::getExtractElement(C2, ExtractIdx);
// If any element of a divisor vector is zero, the whole op is undef.
if ((Opcode == Instruction::SDiv || Opcode == Instruction::UDiv ||
Opcode == Instruction::SRem || Opcode == Instruction::URem) &&
RHS->isNullValue())
if (Instruction::isIntDivRem(Opcode) && RHS->isNullValue())
return UndefValue::get(VTy);
Result.push_back(ConstantExpr::get(Opcode, LHS, RHS));

View File

@ -1423,9 +1423,7 @@ Instruction *InstCombiner::foldShuffledBinop(BinaryOperator &Inst) {
// undefined behavior. All other binop opcodes are always safe to
// speculate, and therefore, it is fine to include undef elements for
// unused lanes (and using undefs may help optimization).
BinaryOperator::BinaryOps Opcode = Inst.getOpcode();
if (Opcode == Instruction::UDiv || Opcode == Instruction::URem ||
Opcode == Instruction::SDiv || Opcode == Instruction::SRem) {
if (Inst.isIntDivRem()) {
assert(C->getType()->getScalarType()->isIntegerTy() &&
"Not expecting FP opcodes/operands/constants here");
for (unsigned i = 0; i < VWidth; ++i)