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[X86] New test to check rev16 patterns, prep step for D74032. NFC.
This commit is contained in:
Sjoerd Meijer
parent
11e984b94f
commit
98e5ebee08
274
test/CodeGen/X86/rev16.ll
Normal file
274
test/CodeGen/X86/rev16.ll
Normal file
@ -0,0 +1,274 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-- | FileCheck %s --check-prefix=X86
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; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s --check-prefix=X64
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; 0xff00ff00 = 4278255360
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; 0x00ff00ff = 16711935
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define i32 @rev16(i32 %a) {
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; X86-LABEL: rev16:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl %eax, %ecx
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; X86-NEXT: shll $8, %ecx
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; X86-NEXT: shrl $8, %eax
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; X86-NEXT: andl $-16711936, %ecx # imm = 0xFF00FF00
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; X86-NEXT: andl $16711935, %eax # imm = 0xFF00FF
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; X86-NEXT: orl %ecx, %eax
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; X86-NEXT: retl
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;
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; X64-LABEL: rev16:
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; X64: # %bb.0:
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; X64-NEXT: # kill: def $edi killed $edi def $rdi
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; X64-NEXT: movl %edi, %eax
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; X64-NEXT: shll $8, %eax
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; X64-NEXT: shrl $8, %edi
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; X64-NEXT: andl $-16711936, %eax # imm = 0xFF00FF00
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; X64-NEXT: andl $16711935, %edi # imm = 0xFF00FF
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; X64-NEXT: addl %edi, %eax
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; X64-NEXT: retq
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%l8 = shl i32 %a, 8
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%r8 = lshr i32 %a, 8
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%mask_l8 = and i32 %l8, 4278255360
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%mask_r8 = and i32 %r8, 16711935
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%tmp = or i32 %mask_l8, %mask_r8
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ret i32 %tmp
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}
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define i32 @not_rev16(i32 %a) {
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; X86-LABEL: not_rev16:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: movl %ecx, %eax
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; X86-NEXT: shll $8, %eax
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; X86-NEXT: shrl $8, %ecx
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; X86-NEXT: andl $65280, %ecx # imm = 0xFF00
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; X86-NEXT: andl $16711680, %eax # imm = 0xFF0000
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; X86-NEXT: orl %ecx, %eax
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; X86-NEXT: retl
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;
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; X64-LABEL: not_rev16:
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; X64: # %bb.0:
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; X64-NEXT: # kill: def $edi killed $edi def $rdi
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; X64-NEXT: movl %edi, %eax
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; X64-NEXT: shll $8, %eax
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; X64-NEXT: shrl $8, %edi
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; X64-NEXT: andl $65280, %edi # imm = 0xFF00
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; X64-NEXT: andl $16711680, %eax # imm = 0xFF0000
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; X64-NEXT: addl %edi, %eax
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; X64-NEXT: retq
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%l8 = shl i32 %a, 8
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%r8 = lshr i32 %a, 8
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%mask_r8 = and i32 %r8, 4278255360
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%mask_l8 = and i32 %l8, 16711935
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%tmp = or i32 %mask_r8, %mask_l8
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ret i32 %tmp
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}
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define i32 @extra_maskop_uses2(i32 %a) {
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; X86-LABEL: extra_maskop_uses2:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: movl %ecx, %edx
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; X86-NEXT: shll $8, %edx
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; X86-NEXT: shrl $8, %ecx
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; X86-NEXT: andl $-16711936, %edx # imm = 0xFF00FF00
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; X86-NEXT: andl $16711935, %ecx # imm = 0xFF00FF
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; X86-NEXT: leal (%ecx,%edx), %eax
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; X86-NEXT: imull %edx, %eax
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; X86-NEXT: imull %ecx, %eax
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; X86-NEXT: retl
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;
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; X64-LABEL: extra_maskop_uses2:
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; X64: # %bb.0:
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; X64-NEXT: # kill: def $edi killed $edi def $rdi
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; X64-NEXT: movl %edi, %ecx
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; X64-NEXT: shll $8, %ecx
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; X64-NEXT: shrl $8, %edi
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; X64-NEXT: andl $-16711936, %ecx # imm = 0xFF00FF00
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; X64-NEXT: andl $16711935, %edi # imm = 0xFF00FF
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; X64-NEXT: leal (%rdi,%rcx), %eax
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; X64-NEXT: imull %ecx, %eax
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; X64-NEXT: imull %edi, %eax
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; X64-NEXT: retq
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%l8 = shl i32 %a, 8
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%r8 = lshr i32 %a, 8
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%mask_l8 = and i32 %l8, 4278255360
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%mask_r8 = and i32 %r8, 16711935
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%or = or i32 %mask_r8, %mask_l8
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%mul = mul i32 %mask_r8, %mask_l8 ; another use of the mask ops
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%r = mul i32 %mul, %or ; and use that result
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ret i32 %r
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}
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define i32 @bswap_ror_commuted(i32 %a) {
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; X86-LABEL: bswap_ror_commuted:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl %eax, %ecx
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; X86-NEXT: shll $8, %ecx
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; X86-NEXT: shrl $8, %eax
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; X86-NEXT: andl $-16711936, %ecx # imm = 0xFF00FF00
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; X86-NEXT: andl $16711935, %eax # imm = 0xFF00FF
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; X86-NEXT: orl %ecx, %eax
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; X86-NEXT: retl
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;
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; X64-LABEL: bswap_ror_commuted:
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; X64: # %bb.0:
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; X64-NEXT: # kill: def $edi killed $edi def $rdi
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; X64-NEXT: movl %edi, %eax
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; X64-NEXT: shll $8, %eax
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; X64-NEXT: shrl $8, %edi
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; X64-NEXT: andl $-16711936, %eax # imm = 0xFF00FF00
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; X64-NEXT: andl $16711935, %edi # imm = 0xFF00FF
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; X64-NEXT: addl %edi, %eax
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; X64-NEXT: retq
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%l8 = shl i32 %a, 8
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%r8 = lshr i32 %a, 8
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%mask_l8 = and i32 %l8, 4278255360
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%mask_r8 = and i32 %r8, 16711935
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%tmp = or i32 %mask_r8, %mask_l8
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ret i32 %tmp
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}
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define i32 @different_shift_amount(i32 %a) {
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; X86-LABEL: different_shift_amount:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl %eax, %ecx
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; X86-NEXT: shll $9, %ecx
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; X86-NEXT: shrl $8, %eax
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; X86-NEXT: andl $-16712192, %ecx # imm = 0xFF00FE00
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; X86-NEXT: andl $16711935, %eax # imm = 0xFF00FF
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; X86-NEXT: orl %ecx, %eax
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; X86-NEXT: retl
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;
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; X64-LABEL: different_shift_amount:
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; X64: # %bb.0:
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; X64-NEXT: # kill: def $edi killed $edi def $rdi
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; X64-NEXT: movl %edi, %eax
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; X64-NEXT: shll $9, %eax
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; X64-NEXT: shrl $8, %edi
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; X64-NEXT: andl $-16712192, %eax # imm = 0xFF00FE00
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; X64-NEXT: andl $16711935, %edi # imm = 0xFF00FF
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; X64-NEXT: addl %edi, %eax
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; X64-NEXT: retq
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%l8 = shl i32 %a, 9
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%r8 = lshr i32 %a, 8
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%mask_l8 = and i32 %l8, 4278255360
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%mask_r8 = and i32 %r8, 16711935
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%tmp = or i32 %mask_l8, %mask_r8
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ret i32 %tmp
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}
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define i32 @different_constant(i32 %a) {
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; X86-LABEL: different_constant:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: shrl $8, %eax
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; X86-NEXT: andl $16711935, %eax # imm = 0xFF00FF
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; X86-NEXT: retl
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;
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; X64-LABEL: different_constant:
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; X64: # %bb.0:
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; X64-NEXT: movl %edi, %eax
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; X64-NEXT: shrl $8, %eax
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; X64-NEXT: andl $16711935, %eax # imm = 0xFF00FF
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; X64-NEXT: retq
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%l8 = shl i32 %a, 8
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%r8 = lshr i32 %a, 8
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%mask_l8 = and i32 %l8, 42
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%mask_r8 = and i32 %r8, 16711935
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%tmp = or i32 %mask_l8, %mask_r8
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ret i32 %tmp
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}
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define i32 @different_op(i32 %a) {
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; X86-LABEL: different_op:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl %eax, %ecx
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; X86-NEXT: shll $8, %ecx
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; X86-NEXT: shrl $8, %eax
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; X86-NEXT: addl $16711936, %ecx # imm = 0xFF0100
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; X86-NEXT: andl $16711935, %eax # imm = 0xFF00FF
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; X86-NEXT: orl %ecx, %eax
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; X86-NEXT: retl
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;
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; X64-LABEL: different_op:
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; X64: # %bb.0:
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; X64-NEXT: movl %edi, %eax
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; X64-NEXT: shll $8, %eax
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; X64-NEXT: shrl $8, %edi
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; X64-NEXT: addl $16711936, %eax # imm = 0xFF0100
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; X64-NEXT: andl $16711935, %edi # imm = 0xFF00FF
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; X64-NEXT: orl %edi, %eax
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; X64-NEXT: retq
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%l8 = shl i32 %a, 8
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%r8 = lshr i32 %a, 8
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%mask_l8 = sub i32 %l8, 4278255360
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%mask_r8 = and i32 %r8, 16711935
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%tmp = or i32 %mask_l8, %mask_r8
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ret i32 %tmp
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}
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define i32 @different_vars(i32 %a, i32 %b) {
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; X86-LABEL: different_vars:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: shll $8, %ecx
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; X86-NEXT: shrl $8, %eax
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; X86-NEXT: andl $-16711936, %ecx # imm = 0xFF00FF00
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; X86-NEXT: andl $16711935, %eax # imm = 0xFF00FF
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; X86-NEXT: orl %ecx, %eax
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; X86-NEXT: retl
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;
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; X64-LABEL: different_vars:
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; X64: # %bb.0:
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; X64-NEXT: # kill: def $esi killed $esi def $rsi
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; X64-NEXT: # kill: def $edi killed $edi def $rdi
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; X64-NEXT: shll $8, %edi
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; X64-NEXT: shrl $8, %esi
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; X64-NEXT: andl $-16711936, %edi # imm = 0xFF00FF00
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; X64-NEXT: andl $16711935, %esi # imm = 0xFF00FF
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; X64-NEXT: leal (%rsi,%rdi), %eax
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; X64-NEXT: retq
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%l8 = shl i32 %a, 8
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%r8 = lshr i32 %b, 8
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%mask_l8 = and i32 %l8, 4278255360
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%mask_r8 = and i32 %r8, 16711935
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%tmp = or i32 %mask_l8, %mask_r8
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ret i32 %tmp
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}
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; TODO: another pattern that we are currently not matching
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;
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; 0xff000000 = 4278190080
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; 0x00ff0000 = 16711680
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; 0x0000ff00 = 65280
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; 0x000000ff = 255
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define i32 @f2(i32 %a) {
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; X86-LABEL: f2:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: bswapl %eax
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; X86-NEXT: roll $16, %eax
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; X86-NEXT: retl
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;
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; X64-LABEL: f2:
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; X64: # %bb.0:
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; X64-NEXT: movl %edi, %eax
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; X64-NEXT: bswapl %eax
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; X64-NEXT: roll $16, %eax
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; X64-NEXT: retq
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%l8 = shl i32 %a, 8
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%r8 = lshr i32 %a, 8
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%masklo_l8 = and i32 %l8, 65280
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%maskhi_l8 = and i32 %l8, 4278190080
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%masklo_r8 = and i32 %r8, 255
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%maskhi_r8 = and i32 %r8, 16711680
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%tmp1 = or i32 %masklo_l8, %masklo_r8
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%tmp2 = or i32 %maskhi_l8, %maskhi_r8
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%tmp = or i32 %tmp1, %tmp2
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ret i32 %tmp
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}
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