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[JumpThreading] Retain debug info when replacing branch instructions
Fixes bug 37966: https://bugs.llvm.org/show_bug.cgi?id=37966 The Jump Threading pass will replace certain conditional branch instructions with unconditional branches when it can prove that only one branch can occur. Prior to this patch, it would not carry the debug info from the old instruction to the new one. This patch fixes the bug described by copying the debug info from the conditional branch instruction to the new unconditional branch instruction, and adds a regression test for the Jump Threading pass that covers this case. Patch by Stephen Tozer! Differential Revision: https://reviews.llvm.org/D58963 llvm-svn: 355822
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@ -1142,7 +1142,9 @@ bool JumpThreadingPass::ProcessBlock(BasicBlock *BB) {
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unsigned ToKeep = Ret == LazyValueInfo::True ? 0 : 1;
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BasicBlock *ToRemoveSucc = CondBr->getSuccessor(ToRemove);
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ToRemoveSucc->removePredecessor(BB, true);
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BranchInst::Create(CondBr->getSuccessor(ToKeep), CondBr);
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BranchInst *UncondBr =
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BranchInst::Create(CondBr->getSuccessor(ToKeep), CondBr);
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UncondBr->setDebugLoc(CondBr->getDebugLoc());
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CondBr->eraseFromParent();
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if (CondCmp->use_empty())
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CondCmp->eraseFromParent();
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@ -1245,7 +1247,8 @@ bool JumpThreadingPass::ProcessImpliedCondition(BasicBlock *BB) {
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BasicBlock *KeepSucc = BI->getSuccessor(*Implication ? 0 : 1);
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BasicBlock *RemoveSucc = BI->getSuccessor(*Implication ? 1 : 0);
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RemoveSucc->removePredecessor(BB);
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BranchInst::Create(KeepSucc, BI);
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BranchInst *UncondBI = BranchInst::Create(KeepSucc, BI);
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UncondBI->setDebugLoc(BI->getDebugLoc());
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BI->eraseFromParent();
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DTU->applyUpdatesPermissive({{DominatorTree::Delete, BB, RemoveSucc}});
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return true;
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41
test/Transforms/JumpThreading/branch-debug-info.ll
Normal file
41
test/Transforms/JumpThreading/branch-debug-info.ll
Normal file
@ -0,0 +1,41 @@
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; RUN: opt %s -debugify -jump-threading -S | FileCheck %s
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; Tests Bug 37966
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define void @test0(i32 %i) {
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; CHECK-LABEL: @test0(
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; CHECK: left:
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; CHECK: br label %left, !dbg ![[DBG0:[0-9]+]]
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entry:
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%c0 = icmp ult i32 %i, 5
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br i1 %c0, label %left, label %right
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left:
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br i1 %c0, label %left, label %right
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right:
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ret void
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}
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define void @test1(i32 %i, i32 %len) {
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; CHECK-LABEL: @test1(
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; CHECK: left:
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; CHECK: br label %right, !dbg ![[DBG1:[0-9]+]]
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entry:
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%i.inc = add nuw i32 %i, 1
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%c0 = icmp ult i32 %i.inc, %len
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br i1 %c0, label %left, label %right
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left:
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%c1 = icmp ult i32 %i, %len
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br i1 %c1, label %right, label %left0
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left0:
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ret void
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right:
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ret void
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}
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; CHECK-DAG: ![[DBG0]] = !DILocation(
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; CHECK-DAG: ![[DBG1]] = !DILocation(
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