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hwasan: Shrink outlined checks by 1 instruction.
Turns out that we can save an instruction by folding the right shift into the compare. Differential Revision: https://reviews.llvm.org/D63568 llvm-svn: 363874
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@ -297,18 +297,13 @@ void AArch64AsmPrinter::EmitHwasanMemaccessSymbols(Module &M) {
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.addImm(0)
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.addImm(0),
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*STI);
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OutStreamer->EmitInstruction(MCInstBuilder(AArch64::UBFMXri)
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.addReg(AArch64::X17)
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.addReg(Reg)
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.addImm(56)
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.addImm(63),
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*STI);
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OutStreamer->EmitInstruction(MCInstBuilder(AArch64::SUBSWrs)
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.addReg(AArch64::WZR)
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.addReg(AArch64::W16)
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.addReg(AArch64::W17)
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.addImm(0),
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*STI);
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OutStreamer->EmitInstruction(
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MCInstBuilder(AArch64::SUBSXrs)
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.addReg(AArch64::XZR)
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.addReg(AArch64::X16)
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.addReg(Reg)
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.addImm(AArch64_AM::getShifterImm(AArch64_AM::LSR, 56)),
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*STI);
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MCSymbol *HandleMismatchSym = OutContext.createTempSymbol();
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OutStreamer->EmitInstruction(
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MCInstBuilder(AArch64::Bcc)
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@ -38,8 +38,7 @@ declare void @llvm.hwasan.check.memaccess(i8*, i8*, i32)
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; CHECK-NEXT: __hwasan_check_x0_456:
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; CHECK-NEXT: ubfx x16, x0, #4, #52
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; CHECK-NEXT: ldrb w16, [x9, x16]
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; CHECK-NEXT: lsr x17, x0, #56
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; CHECK-NEXT: cmp w16, w17
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; CHECK-NEXT: cmp x16, x0, lsr #56
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; CHECK-NEXT: b.ne .Ltmp0
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; CHECK-NEXT: ret
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; CHECK-NEXT: .Ltmp0:
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@ -58,8 +57,7 @@ declare void @llvm.hwasan.check.memaccess(i8*, i8*, i32)
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; CHECK-NEXT: __hwasan_check_x1_123:
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; CHECK-NEXT: ubfx x16, x1, #4, #52
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; CHECK-NEXT: ldrb w16, [x9, x16]
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; CHECK-NEXT: lsr x17, x1, #56
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; CHECK-NEXT: cmp w16, w17
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; CHECK-NEXT: cmp x16, x1, lsr #56
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; CHECK-NEXT: b.ne .Ltmp1
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; CHECK-NEXT: ret
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; CHECK-NEXT: .Ltmp1:
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