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[x86] limit extractelement of setcc to pre-legalization
A fuzzer found the crasher: https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=13700 The bug was introduced recently here: rL355741 This is the quick fix. If we need to do this transform later, then we'd have to extend/truncate the vector setcc element type to the scalar setcc type (i8). llvm-svn: 356053
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@ -34349,7 +34349,7 @@ static SDValue scalarizeExtEltFP(SDNode *ExtElt, SelectionDAG &DAG) {
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// Vector FP compares don't fit the pattern of FP math ops (propagate, not
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// extract, the condition code), so deal with those as a special-case.
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if (Vec.getOpcode() == ISD::SETCC) {
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if (Vec.getOpcode() == ISD::SETCC && VT == MVT::i1) {
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EVT OpVT = Vec.getOperand(0).getValueType().getScalarType();
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if (OpVT != MVT::f32 && OpVT != MVT::f64)
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return SDValue();
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@ -152,6 +152,25 @@ define i1 @fcmp_v4f64(<4 x double> %x, <4 x double> %y) nounwind {
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ret i1 %r
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}
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; If we do the fcmp transform late, make sure we have the right types.
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; https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=13700
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define void @extsetcc(<4 x float> %x) {
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; CHECK-LABEL: extsetcc:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vxorps %xmm1, %xmm1, %xmm1
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; CHECK-NEXT: vcmpnleps %xmm0, %xmm1, %xmm0
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; CHECK-NEXT: vextractps $0, %xmm0, %eax
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; CHECK-NEXT: andl $1, %eax
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; CHECK-NEXT: movb %al, (%rax)
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; CHECK-NEXT: retq
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%cmp = fcmp ult <4 x float> %x, zeroinitializer
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%sext = sext <4 x i1> %cmp to <4 x i32>
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%e = extractelement <4 x i1> %cmp, i1 0
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store i1 %e, i1* undef
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ret void
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}
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define float @select_fcmp_v4f32(<4 x float> %x, <4 x float> %y, <4 x float> %z, <4 x float> %w) nounwind {
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; CHECK-LABEL: select_fcmp_v4f32:
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; CHECK: # %bb.0:
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