mirror of
https://github.com/RPCS3/llvm-mirror.git
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avoid calling the virtual isMoveInstr method endlessly by caching its results.
llvm-svn: 29994
This commit is contained in:
parent
f0e85f8600
commit
998dd9b42e
@ -78,10 +78,12 @@ namespace llvm {
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float weight; // weight of this interval
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Ranges ranges; // the ranges in which this register is live
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private:
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/// InstDefiningValue - This tracks the def index of the instruction that
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/// defines a particular value number in the interval. This may be ~0,
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/// which is treated as unknown, or ~1, which is a deleted value number.
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SmallVector<unsigned, 4> InstDefiningValue;
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/// ValueNumberInfo - If this value number is not defined by a copy, this
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/// holds ~0,x. If the value number is not in use, it contains ~1,x to
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/// indicate that the value # is not used. If the val# is defined by a
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/// copy, the first entry is the instruction # of the copy, and the second
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/// is the register number copied from.
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SmallVector<std::pair<unsigned,unsigned>, 4> ValueNumberInfo;
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public:
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LiveInterval(unsigned Reg, float Weight)
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@ -113,31 +115,44 @@ namespace llvm {
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std::swap(reg, other.reg);
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std::swap(weight, other.weight);
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std::swap(ranges, other.ranges);
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std::swap(InstDefiningValue, other.InstDefiningValue);
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std::swap(ValueNumberInfo, other.ValueNumberInfo);
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}
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bool containsOneValue() const { return InstDefiningValue.size() == 1; }
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bool containsOneValue() const { return ValueNumberInfo.size() == 1; }
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unsigned getNumValNums() const { return InstDefiningValue.size(); }
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unsigned getNumValNums() const { return ValueNumberInfo.size(); }
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/// getNextValue - Create a new value number and return it. MIIdx specifies
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/// the instruction that defines the value number.
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unsigned getNextValue(unsigned MIIdx) {
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InstDefiningValue.push_back(MIIdx);
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return InstDefiningValue.size()-1;
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unsigned getNextValue(unsigned MIIdx, unsigned SrcReg) {
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ValueNumberInfo.push_back(std::make_pair(MIIdx, SrcReg));
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return ValueNumberInfo.size()-1;
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}
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/// getInstForValNum - Return the machine instruction index that defines the
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/// specified value number.
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unsigned getInstForValNum(unsigned ValNo) const {
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assert(ValNo < InstDefiningValue.size());
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return InstDefiningValue[ValNo];
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assert(ValNo < ValueNumberInfo.size());
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return ValueNumberInfo[ValNo].first;
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}
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/// setInstDefiningValNum - Change the instruction defining the specified
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/// value number to the specified instruction.
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void setInstDefiningValNum(unsigned ValNo, unsigned MIIdx) {
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InstDefiningValue[ValNo] = MIIdx;
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unsigned getSrcRegForValNum(unsigned ValNo) const {
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assert(ValNo < ValueNumberInfo.size());
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if (ValueNumberInfo[ValNo].first < ~2U)
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return ValueNumberInfo[ValNo].second;
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return 0;
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}
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std::pair<unsigned, unsigned> getValNumInfo(unsigned ValNo) const {
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assert(ValNo < ValueNumberInfo.size());
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return ValueNumberInfo[ValNo];
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}
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/// setValueNumberInfo - Change the value number info for the specified
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/// value number.
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void setValueNumberInfo(unsigned ValNo,
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const std::pair<unsigned, unsigned> &I){
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ValueNumberInfo[ValNo] = I;
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}
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/// MergeValueNumberInto - This method is called when two value nubmers
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@ -216,7 +231,7 @@ namespace llvm {
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/// the intervals are not joinable, this aborts.
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void join(LiveInterval &Other, int *ValNoAssignments,
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int *RHSValNoAssignments,
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SmallVector<unsigned, 16> &NewInstDefiningValue);
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SmallVector<std::pair<unsigned,unsigned>,16> &NewValueNumberInfo);
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/// removeRange - Remove the specified range from this interval. Note that
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@ -198,8 +198,8 @@ namespace llvm {
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/// def.
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void handlePhysicalRegisterDef(MachineBasicBlock* mbb,
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MachineBasicBlock::iterator mi,
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LiveInterval& interval,
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bool isLiveIn = false);
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LiveInterval &interval,
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unsigned SrcReg);
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/// Return true if the two specified registers belong to different
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/// register classes. The registers may be either phys or virt regs.
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@ -280,7 +280,8 @@ LiveInterval::FindLiveRangeContaining(unsigned Idx) {
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/// the intervals are not joinable, this aborts.
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void LiveInterval::join(LiveInterval &Other, int *LHSValNoAssignments,
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int *RHSValNoAssignments,
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SmallVector<unsigned, 16> &NewInstDefiningValue) {
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SmallVector<std::pair<unsigned,
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unsigned>, 16> &NewValueNumberInfo) {
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// Try to do the least amount of work possible. In particular, if there are
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// more liverange chunks in the other set than there are in the 'this' set,
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@ -300,7 +301,7 @@ void LiveInterval::join(LiveInterval &Other, int *LHSValNoAssignments,
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// we want to avoid the interval scan if not.
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bool MustMapCurValNos = false;
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for (unsigned i = 0, e = getNumValNums(); i != e; ++i) {
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if (InstDefiningValue[i] == ~2U) continue; // tombstone value #
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if (ValueNumberInfo[i].first == ~2U) continue; // tombstone value #
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if (i != (unsigned)LHSValNoAssignments[i]) {
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MustMapCurValNos = true;
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break;
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@ -345,9 +346,8 @@ void LiveInterval::join(LiveInterval &Other, int *LHSValNoAssignments,
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InsertPos = addRangeFrom(*I, InsertPos);
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}
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InstDefiningValue.clear();
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InstDefiningValue.append(NewInstDefiningValue.begin(),
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NewInstDefiningValue.end());
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ValueNumberInfo.clear();
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ValueNumberInfo.append(NewValueNumberInfo.begin(), NewValueNumberInfo.end());
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weight += Other.weight;
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}
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@ -360,7 +360,7 @@ void LiveInterval::MergeInClobberRanges(const LiveInterval &Clobbers) {
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// Find a value # to use for the clobber ranges. If there is already a value#
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// for unknown values, use it.
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// FIXME: Use a single sentinal number for these!
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unsigned ClobberValNo = getNextValue(~0U);
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unsigned ClobberValNo = getNextValue(~0U, 0);
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iterator IP = begin();
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for (const_iterator I = Clobbers.begin(), E = Clobbers.end(); I != E; ++I) {
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@ -399,7 +399,7 @@ void LiveInterval::MergeValueNumberInto(unsigned V1, unsigned V2) {
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// Make sure V2 is smaller than V1.
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if (V1 < V2) {
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setInstDefiningValNum(V1, getInstForValNum(V2));
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setValueNumberInfo(V1, getValNumInfo(V2));
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std::swap(V1, V2);
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}
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@ -443,10 +443,10 @@ void LiveInterval::MergeValueNumberInto(unsigned V1, unsigned V2) {
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// ~1U so it can be nuked later.
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if (V1 == getNumValNums()-1) {
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do {
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InstDefiningValue.pop_back();
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} while (InstDefiningValue.back() == ~1U);
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ValueNumberInfo.pop_back();
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} while (ValueNumberInfo.back().first == ~1U);
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} else {
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InstDefiningValue[V1] = ~1U;
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ValueNumberInfo[V1].first = ~1U;
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}
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}
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@ -482,10 +482,10 @@ void LiveInterval::print(std::ostream &OS, const MRegisterInfo *MRI) const {
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for (unsigned i = 0; i != getNumValNums(); ++i) {
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if (i) OS << " ";
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OS << i << "@";
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if (InstDefiningValue[i] == ~0U) {
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if (ValueNumberInfo[i].first == ~0U) {
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OS << "?";
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} else {
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OS << InstDefiningValue[i];
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OS << ValueNumberInfo[i].first;
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}
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}
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}
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@ -138,10 +138,10 @@ bool LiveIntervals::runOnMachineFunction(MachineFunction &fn) {
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for (MachineFunction::livein_iterator I = fn.livein_begin(),
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E = fn.livein_end(); I != E; ++I) {
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handlePhysicalRegisterDef(Entry, Entry->begin(),
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getOrCreateInterval(I->first), true);
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getOrCreateInterval(I->first), 0);
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for (const unsigned* AS = mri_->getAliasSet(I->first); *AS; ++AS)
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handlePhysicalRegisterDef(Entry, Entry->begin(),
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getOrCreateInterval(*AS), true);
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getOrCreateInterval(*AS), 0);
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}
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}
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@ -321,7 +321,7 @@ addIntervalsForSpills(const LiveInterval &li, VirtRegMap &vrm, int slot) {
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// the spill weight is now infinity as it
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// cannot be spilled again
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nI.weight = float(HUGE_VAL);
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LiveRange LR(start, end, nI.getNextValue(~0U));
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LiveRange LR(start, end, nI.getNextValue(~0U, 0));
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DEBUG(std::cerr << " +" << LR);
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nI.addRange(LR);
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added.push_back(&nI);
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@ -366,7 +366,13 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb,
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// Get the Idx of the defining instructions.
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unsigned defIndex = getDefIndex(getInstructionIndex(mi));
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unsigned ValNum = interval.getNextValue(defIndex);
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unsigned ValNum;
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unsigned SrcReg, DstReg;
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if (!tii_->isMoveInstr(*mi, SrcReg, DstReg))
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ValNum = interval.getNextValue(~0U, 0);
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else
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ValNum = interval.getNextValue(defIndex, SrcReg);
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assert(ValNum == 0 && "First value in interval is not 0?");
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ValNum = 0; // Clue in the optimizer.
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@ -455,12 +461,13 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb,
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// that at this point, there should be exactly one value number in it.
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assert(interval.containsOneValue() && "Unexpected 2-addr liveint!");
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// The new value number is defined by the instruction we claimed defined
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// value #0.
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unsigned ValNo = interval.getNextValue(DefIndex);
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// The new value number (#1) is defined by the instruction we claimed
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// defined value #0.
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unsigned ValNo = interval.getNextValue(0, 0);
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interval.setValueNumberInfo(1, interval.getValNumInfo(0));
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// Value#1 is now defined by the 2-addr instruction.
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interval.setInstDefiningValNum(0, RedefIndex);
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// Value#0 is now defined by the 2-addr instruction.
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interval.setValueNumberInfo(0, std::make_pair(~0U, 0U));
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// Add the new live interval which replaces the range for the input copy.
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LiveRange LR(DefIndex, RedefIndex, ValNo);
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@ -493,7 +500,7 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb,
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// Replace the interval with one of a NEW value number. Note that this
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// value number isn't actually defined by an instruction, weird huh? :)
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LiveRange LR(Start, End, interval.getNextValue(~0U));
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LiveRange LR(Start, End, interval.getNextValue(~0U, 0));
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DEBUG(std::cerr << " replace range with " << LR);
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interval.addRange(LR);
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DEBUG(std::cerr << "RESULT: "; interval.print(std::cerr, mri_));
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@ -503,9 +510,16 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb,
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// live until the end of the block. We've already taken care of the
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// rest of the live range.
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unsigned defIndex = getDefIndex(getInstructionIndex(mi));
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unsigned ValNum;
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unsigned SrcReg, DstReg;
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if (!tii_->isMoveInstr(*mi, SrcReg, DstReg))
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ValNum = interval.getNextValue(~0U, 0);
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else
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ValNum = interval.getNextValue(defIndex, SrcReg);
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LiveRange LR(defIndex,
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getInstructionIndex(&mbb->back()) + InstrSlots::NUM,
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interval.getNextValue(defIndex));
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getInstructionIndex(&mbb->back()) + InstrSlots::NUM, ValNum);
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interval.addRange(LR);
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DEBUG(std::cerr << " +" << LR);
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}
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@ -516,8 +530,8 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb,
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void LiveIntervals::handlePhysicalRegisterDef(MachineBasicBlock *MBB,
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MachineBasicBlock::iterator mi,
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LiveInterval& interval,
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bool isLiveIn) {
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LiveInterval &interval,
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unsigned SrcReg) {
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// A physical register cannot be live across basic block, so its
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// lifetime must end somewhere in its defining basic block.
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DEBUG(std::cerr << "\t\tregister: "; printRegName(interval.reg));
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@ -551,13 +565,14 @@ void LiveIntervals::handlePhysicalRegisterDef(MachineBasicBlock *MBB,
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// The only case we should have a dead physreg here without a killing or
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// instruction where we know it's dead is if it is live-in to the function
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// and never used.
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assert(isLiveIn && "physreg was not killed in defining block!");
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assert(!SrcReg && "physreg was not killed in defining block!");
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end = getDefIndex(start) + 1; // It's dead.
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exit:
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assert(start < end && "did not find end of interval?");
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LiveRange LR(start, end, interval.getNextValue(isLiveIn ? ~0U : start));
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LiveRange LR(start, end, interval.getNextValue(SrcReg != 0 ? start : ~0U,
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SrcReg));
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interval.addRange(LR);
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DEBUG(std::cerr << " +" << LR << '\n');
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}
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@ -568,9 +583,12 @@ void LiveIntervals::handleRegisterDef(MachineBasicBlock *MBB,
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if (MRegisterInfo::isVirtualRegister(reg))
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handleVirtualRegisterDef(MBB, MI, getOrCreateInterval(reg));
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else if (allocatableRegs_[reg]) {
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handlePhysicalRegisterDef(MBB, MI, getOrCreateInterval(reg));
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unsigned SrcReg, DstReg;
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if (!tii_->isMoveInstr(*MI, SrcReg, DstReg))
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SrcReg = 0;
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handlePhysicalRegisterDef(MBB, MI, getOrCreateInterval(reg), SrcReg);
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for (const unsigned* AS = mri_->getAliasSet(reg); *AS; ++AS)
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handlePhysicalRegisterDef(MBB, MI, getOrCreateInterval(*AS), true);
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handlePhysicalRegisterDef(MBB, MI, getOrCreateInterval(*AS), 0);
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}
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}
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@ -652,24 +670,17 @@ bool LiveIntervals::AdjustCopiesBackFrom(LiveInterval &IntA, LiveInterval &IntB,
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// If AValNo is defined as a copy from IntB, we can potentially process this.
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// Get the instruction that defines this value number.
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unsigned AValNoInstIdx = IntA.getInstForValNum(AValNo);
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// If it's unknown, ignore it.
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if (AValNoInstIdx == ~0U || AValNoInstIdx == ~1U) return false;
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// Otherwise, get the instruction for it.
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MachineInstr *AValNoInstMI = getInstructionFromIndex(AValNoInstIdx);
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unsigned SrcReg = IntA.getSrcRegForValNum(AValNo);
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if (!SrcReg) return false; // Not defined by a copy.
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// If the value number is not defined by a copy instruction, ignore it.
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unsigned SrcReg, DstReg;
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if (!tii_->isMoveInstr(*AValNoInstMI, SrcReg, DstReg))
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return false;
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// If the source register comes from an interval other than IntB, we can't
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// handle this.
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assert(rep(DstReg) == IntA.reg && "Not defining a reg in IntA?");
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if (rep(SrcReg) != IntB.reg) return false;
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// Get the LiveRange in IntB that this value number starts with.
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unsigned AValNoInstIdx = IntA.getInstForValNum(AValNo);
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LiveInterval::iterator ValLR = IntB.FindLiveRangeContaining(AValNoInstIdx-1);
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// Make sure that the end of the live range is inside the same block as
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@ -687,7 +698,7 @@ bool LiveIntervals::AdjustCopiesBackFrom(LiveInterval &IntA, LiveInterval &IntB,
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// We are about to delete CopyMI, so need to remove it as the 'instruction
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// that defines this value #'.
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IntB.setInstDefiningValNum(BValNo, ~0U);
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IntB.setValueNumberInfo(BValNo, std::make_pair(~0U, 0));
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// Okay, we can merge them. We need to insert a new liverange:
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// [ValLR.end, BLR.begin) of either value number, then we merge the
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@ -701,7 +712,7 @@ bool LiveIntervals::AdjustCopiesBackFrom(LiveInterval &IntA, LiveInterval &IntB,
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for (const unsigned *AS = mri_->getAliasSet(IntB.reg); *AS; ++AS) {
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LiveInterval &AliasLI = getInterval(*AS);
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AliasLI.addRange(LiveRange(FillerStart, FillerEnd,
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AliasLI.getNextValue(~0U)));
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AliasLI.getNextValue(~0U, 0)));
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}
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}
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@ -832,7 +843,8 @@ bool LiveIntervals::JoinCopy(MachineInstr *CopyMI,
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/// contains the value number the copy is from.
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///
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static unsigned ComputeUltimateVN(unsigned VN,
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SmallVector<unsigned, 16> &InstDefiningValue,
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SmallVector<std::pair<unsigned,
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unsigned>, 16> &ValueNumberInfo,
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SmallVector<int, 16> &ThisFromOther,
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SmallVector<int, 16> &OtherFromThis,
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SmallVector<int, 16> &ThisValNoAssignments,
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@ -847,8 +859,8 @@ static unsigned ComputeUltimateVN(unsigned VN,
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// number in the destination.
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int OtherValNo = ThisFromOther[VN];
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if (OtherValNo == -1) {
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InstDefiningValue.push_back(ThisLI.getInstForValNum(VN));
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return ThisValNoAssignments[VN] = InstDefiningValue.size()-1;
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ValueNumberInfo.push_back(ThisLI.getValNumInfo(VN));
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return ThisValNoAssignments[VN] = ValueNumberInfo.size()-1;
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}
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// Otherwise, this *is* a copy from the RHS. Mark this value number as
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@ -856,7 +868,7 @@ static unsigned ComputeUltimateVN(unsigned VN,
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// value is.
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ThisValNoAssignments[VN] = -2;
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unsigned UltimateVN =
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ComputeUltimateVN(OtherValNo, InstDefiningValue,
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ComputeUltimateVN(OtherValNo, ValueNumberInfo,
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OtherFromThis, ThisFromOther,
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OtherValNoAssignments, ThisValNoAssignments,
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OtherLI, ThisLI);
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@ -875,24 +887,17 @@ bool LiveIntervals::JoinIntervals(LiveInterval &LHS, LiveInterval &RHS) {
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SmallVector<int, 16> LHSValsDefinedFromRHS;
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LHSValsDefinedFromRHS.resize(LHS.getNumValNums(), -1);
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for (unsigned VN = 0, e = LHS.getNumValNums(); VN != e; ++VN) {
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unsigned ValInst = LHS.getInstForValNum(VN);
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if (ValInst == ~0U || ValInst == ~1U)
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unsigned ValSrcReg = LHS.getSrcRegForValNum(VN);
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if (ValSrcReg == 0) // Src not defined by a copy?
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continue;
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// If the instruction defining the LHS's value is a copy.
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MachineInstr *ValInstMI = getInstructionFromIndex(ValInst);
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// If the value number is not defined by a copy instruction, ignore it.
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unsigned SrcReg, DstReg;
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if (!tii_->isMoveInstr(*ValInstMI, SrcReg, DstReg))
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continue;
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// DstReg is known to be a register in the LHS interval. If the src is from
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// the RHS interval, we can use its value #.
|
||||
if (rep(SrcReg) != RHS.reg)
|
||||
if (rep(ValSrcReg) != RHS.reg)
|
||||
continue;
|
||||
|
||||
|
||||
// Figure out the value # from the RHS.
|
||||
unsigned ValInst = LHS.getInstForValNum(VN);
|
||||
LHSValsDefinedFromRHS[VN] = RHS.getLiveRangeContaining(ValInst-1)->ValId;
|
||||
}
|
||||
|
||||
@ -901,24 +906,17 @@ bool LiveIntervals::JoinIntervals(LiveInterval &LHS, LiveInterval &RHS) {
|
||||
SmallVector<int, 16> RHSValsDefinedFromLHS;
|
||||
RHSValsDefinedFromLHS.resize(RHS.getNumValNums(), -1);
|
||||
for (unsigned VN = 0, e = RHS.getNumValNums(); VN != e; ++VN) {
|
||||
unsigned ValInst = RHS.getInstForValNum(VN);
|
||||
if (ValInst == ~0U || ValInst == ~1U)
|
||||
continue;
|
||||
|
||||
// If the instruction defining the RHS's value is a copy.
|
||||
MachineInstr *ValInstMI = getInstructionFromIndex(ValInst);
|
||||
|
||||
// If the value number is not defined by a copy instruction, ignore it.
|
||||
unsigned SrcReg, DstReg;
|
||||
if (!tii_->isMoveInstr(*ValInstMI, SrcReg, DstReg))
|
||||
unsigned ValSrcReg = RHS.getSrcRegForValNum(VN);
|
||||
if (ValSrcReg == 0) // Src not defined by a copy?
|
||||
continue;
|
||||
|
||||
// DstReg is known to be a register in the RHS interval. If the src is from
|
||||
// the LHS interval, we can use its value #.
|
||||
if (rep(SrcReg) != LHS.reg)
|
||||
if (rep(ValSrcReg) != LHS.reg)
|
||||
continue;
|
||||
|
||||
// Figure out the value # from the LHS.
|
||||
unsigned ValInst = RHS.getInstForValNum(VN);
|
||||
RHSValsDefinedFromLHS[VN] = LHS.getLiveRangeContaining(ValInst-1)->ValId;
|
||||
}
|
||||
|
||||
@ -926,20 +924,20 @@ bool LiveIntervals::JoinIntervals(LiveInterval &LHS, LiveInterval &RHS) {
|
||||
// assuming that the live ranges can be coallesced.
|
||||
SmallVector<int, 16> LHSValNoAssignments;
|
||||
SmallVector<int, 16> RHSValNoAssignments;
|
||||
SmallVector<unsigned, 16> InstDefiningValue;
|
||||
SmallVector<std::pair<unsigned,unsigned>, 16> ValueNumberInfo;
|
||||
LHSValNoAssignments.resize(LHS.getNumValNums(), -1);
|
||||
RHSValNoAssignments.resize(RHS.getNumValNums(), -1);
|
||||
|
||||
// Compute ultimate value numbers for the LHS and RHS values.
|
||||
for (unsigned VN = 0, e = LHS.getNumValNums(); VN != e; ++VN) {
|
||||
if (LHS.getInstForValNum(VN) == ~2U) continue;
|
||||
ComputeUltimateVN(VN, InstDefiningValue,
|
||||
ComputeUltimateVN(VN, ValueNumberInfo,
|
||||
LHSValsDefinedFromRHS, RHSValsDefinedFromLHS,
|
||||
LHSValNoAssignments, RHSValNoAssignments, LHS, RHS);
|
||||
}
|
||||
for (unsigned VN = 0, e = RHS.getNumValNums(); VN != e; ++VN) {
|
||||
if (RHS.getInstForValNum(VN) == ~2U) continue;
|
||||
ComputeUltimateVN(VN, InstDefiningValue,
|
||||
ComputeUltimateVN(VN, ValueNumberInfo,
|
||||
RHSValsDefinedFromLHS, LHSValsDefinedFromRHS,
|
||||
RHSValNoAssignments, LHSValNoAssignments, RHS, LHS);
|
||||
}
|
||||
@ -989,7 +987,7 @@ bool LiveIntervals::JoinIntervals(LiveInterval &LHS, LiveInterval &RHS) {
|
||||
// If we get here, we know that we can coallesce the live ranges. Ask the
|
||||
// intervals to coallesce themselves now.
|
||||
LHS.join(RHS, &LHSValNoAssignments[0], &RHSValNoAssignments[0],
|
||||
InstDefiningValue);
|
||||
ValueNumberInfo);
|
||||
return true;
|
||||
}
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user