1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-23 03:02:36 +01:00

[X86][SSE3] Just use an explicit SSE3 target attribute - not a cpu type.

Merged arch/target into a specific triple - we had i686 and x86_64 targets overriding each other....

llvm-svn: 241410
This commit is contained in:
Simon Pilgrim 2015-07-05 19:06:32 +00:00
parent 7cc9f6e96f
commit 99be799579

View File

@ -1,6 +1,6 @@
; These are tests for SSE3 codegen.
; RUN: llc < %s -march=x86-64 -mcpu=nocona -mtriple=i686-apple-darwin9 -O3 | FileCheck %s --check-prefix=X64
; RUN: llc < %s -mtriple=x86_64-apple-darwin9 --mattr=+sse3 | FileCheck %s --check-prefix=X64
; Test for v8xi16 lowering where we extract the first element of the vector and
; placed it in the second element of the result.