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Currently AsmWriterEmiter.cpp (used by tblgen -gen-asm-writer) does not

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consider the Predicates attached to InstAlias when generating printAliasInstr.
This forces users of printAliasInstr to check those predicates beforehand.

This commit adds them in the condition set of the IAPrinter object.

Patch by: Roger Ferrer Ibanez

Differential Revision: http://reviews.llvm.org/D20233

llvm-svn: 271665
This commit is contained in:
Sjoerd Meijer 2016-06-03 13:14:19 +00:00
parent fee452853f
commit 9a100cced7
1 changed files with 34 additions and 2 deletions
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36
utils/TableGen/AsmWriterEmitter.cpp
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@ -601,7 +601,6 @@ namespace {
class IAPrinter {
std::vector<std::string> Conds;
std::map<StringRef, std::pair<int, int>> OpMap;
SmallVector<Record*, 4> ReqFeatures;
std::string Result;
std::string AsmString;
@ -648,7 +647,7 @@ public:
}
void print(raw_ostream &O) {
if (Conds.empty() && ReqFeatures.empty()) {
if (Conds.empty()) {
O.indent(6) << "return true;\n";
return;
}
@ -798,6 +797,18 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) {
IAPrinter IAP(CGA.Result->getAsString(), CGA.AsmString);
std::string Namespace = Target.getName();
std::vector<Record *> ReqFeatures;
if (PassSubtarget) {
// We only consider ReqFeatures predicates if PassSubtarget
std::vector<Record *> RF =
CGA.TheDef->getValueAsListOfDefs("Predicates");
std::copy_if(RF.begin(), RF.end(), std::back_inserter(ReqFeatures),
[](Record *R) {
return R->getValueAsBit("AssemblerMatcherPredicate");
});
}
unsigned NumMIOps = 0;
for (auto &Operand : CGA.ResultOperands)
NumMIOps += Operand.getMINumOperands();
@ -902,6 +913,27 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) {
}
if (CantHandle) continue;
for (auto I = ReqFeatures.cbegin(); I != ReqFeatures.cend(); I++) {
Record *R = *I;
std::string AsmCondString = R->getValueAsString("AssemblerCondString");
// AsmCondString has syntax [!]F(,[!]F)*
SmallVector<StringRef, 4> Ops;
SplitString(AsmCondString, Ops, ",");
assert(!Ops.empty() && "AssemblerCondString cannot be empty");
for (auto &Op : Ops) {
assert(!Op.empty() && "Empty operator");
if (Op[0] == '!')
Cond = "!STI.getFeatureBits()[" + Namespace + "::" +
Op.substr(1).str() + "]";
else
Cond = "STI.getFeatureBits()[" + Namespace + "::" + Op.str() + "]";
IAP.addCond(Cond);
}
}
IAPrinterMap[Aliases.first].push_back(std::move(IAP));
}
}