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[WebAssembly] Renumber SIMD bitwise instructions

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Summary: Changed to match https://github.com/WebAssembly/simd/pull/54.

Reviewers: aheejin

Subscribers: dschuff, sbc100, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D54561

llvm-svn: 346931
This commit is contained in:
Thomas Lively 2018-11-15 03:38:59 +00:00
parent 4aec34a235
commit 9a14768984
2 changed files with 14 additions and 14 deletions
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16
lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
View File

@ -559,16 +559,16 @@ multiclass SIMDUnary<ValueType vec_t, string vec, SDNode node, string name,
vec#"."#name#"\t$dst, $vec", vec#"."#name, simdop>;
}
// Bitwise logic: v128.and / v128.or / v128.xor
let isCommutable = 1 in {
defm AND : SIMDBitwise<and, "and", 76>;
defm OR : SIMDBitwise<or, "or", 77>;
defm XOR : SIMDBitwise<xor, "xor", 78>;
} // isCommutable = 1
// Bitwise logic: v128.not
foreach vec_t = [v16i8, v8i16, v4i32, v2i64] in
defm NOT: SIMDUnary<vec_t, "v128", vnot, "not", 79>;
defm NOT: SIMDUnary<vec_t, "v128", vnot, "not", 76>;
// Bitwise logic: v128.and / v128.or / v128.xor
let isCommutable = 1 in {
defm AND : SIMDBitwise<and, "and", 77>;
defm OR : SIMDBitwise<or, "or", 78>;
defm XOR : SIMDBitwise<xor, "xor", 79>;
} // isCommutable = 1
// Bitwise select: v128.bitselect
foreach vec_t = [v16i8, v8i16, v4i32, v2i64, v4f32, v2f64] in

12
test/MC/WebAssembly/simd-encodings.s
View File

@ -226,18 +226,18 @@
# CHECK: f64x2.ge # encoding: [0xfd,0x4b]
f64x2.ge
# CHECK: v128.and # encoding: [0xfd,0x4c]
# CHECK: v128.not # encoding: [0xfd,0x4c]
v128.not
# CHECK: v128.and # encoding: [0xfd,0x4d]
v128.and
# CHECK: v128.or # encoding: [0xfd,0x4d]
# CHECK: v128.or # encoding: [0xfd,0x4e]
v128.or
# CHECK: v128.xor # encoding: [0xfd,0x4e]
# CHECK: v128.xor # encoding: [0xfd,0x4f]
v128.xor
# CHECK: v128.not # encoding: [0xfd,0x4f]
v128.not
# CHECK: v128.bitselect # encoding: [0xfd,0x50]
v128.bitselect