From 9a5c67248463b9e93b0d06526bef538dfd70655c Mon Sep 17 00:00:00 2001 From: Jay Foad Date: Wed, 17 Feb 2021 09:44:05 +0000 Subject: [PATCH] [AMDGPU] Rename simplifyI24 to simplifyMul24 Also simplify one of its call sites. NFC. --- lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 13 +++++-------- 1 file changed, 5 insertions(+), 8 deletions(-) diff --git a/lib/Target/AMDGPU/AMDGPUISelLowering.cpp b/lib/Target/AMDGPU/AMDGPUISelLowering.cpp index 504953583d4..afdca239b0f 100644 --- a/lib/Target/AMDGPU/AMDGPUISelLowering.cpp +++ b/lib/Target/AMDGPU/AMDGPUISelLowering.cpp @@ -2787,8 +2787,8 @@ static bool isI24(SDValue Op, SelectionDAG &DAG) { AMDGPUTargetLowering::numBitsSigned(Op, DAG) < 24; } -static SDValue simplifyI24(SDNode *Node24, - TargetLowering::DAGCombinerInfo &DCI) { +static SDValue simplifyMul24(SDNode *Node24, + TargetLowering::DAGCombinerInfo &DCI) { SelectionDAG &DAG = DCI.DAG; const TargetLowering &TLI = DAG.getTargetLoweringInfo(); bool IsIntrin = Node24->getOpcode() == ISD::INTRINSIC_WO_CHAIN; @@ -3008,7 +3008,7 @@ SDValue AMDGPUTargetLowering::performIntrinsicWOChainCombine( switch (IID) { case Intrinsic::amdgcn_mul_i24: case Intrinsic::amdgcn_mul_u24: - return simplifyI24(N, DCI); + return simplifyMul24(N, DCI); case Intrinsic::amdgcn_fract: case Intrinsic::amdgcn_rsq: case Intrinsic::amdgcn_rcp_legacy: @@ -3983,11 +3983,8 @@ SDValue AMDGPUTargetLowering::PerformDAGCombine(SDNode *N, case AMDGPUISD::MUL_I24: case AMDGPUISD::MUL_U24: case AMDGPUISD::MULHI_I24: - case AMDGPUISD::MULHI_U24: { - if (SDValue V = simplifyI24(N, DCI)) - return V; - return SDValue(); - } + case AMDGPUISD::MULHI_U24: + return simplifyMul24(N, DCI); case ISD::SELECT: return performSelectCombine(N, DCI); case ISD::FNEG: