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Fix calling convention on ARM if vfp2+ is enabled.
llvm-svn: 109009
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@ -831,8 +831,9 @@ static bool f64AssignAAPCS(unsigned &ValNo, EVT &ValVT, EVT &LocVT,
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CCState &State, bool CanFail) {
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static const unsigned HiRegList[] = { ARM::R0, ARM::R2 };
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static const unsigned LoRegList[] = { ARM::R1, ARM::R3 };
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static const unsigned ShadowRegList[] = { ARM::R0, ARM::R1 };
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unsigned Reg = State.AllocateReg(HiRegList, LoRegList, 2);
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unsigned Reg = State.AllocateReg(HiRegList, ShadowRegList, 2);
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if (Reg == 0) {
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// For the 2nd half of a v2f64, do not just fail.
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if (CanFail)
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@ -850,6 +851,9 @@ static bool f64AssignAAPCS(unsigned &ValNo, EVT &ValVT, EVT &LocVT,
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if (HiRegList[i] == Reg)
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break;
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unsigned T = State.AllocateReg(LoRegList[i]);
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assert(T == LoRegList[i] && "Could not allocate register");
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State.addLoc(CCValAssign::getCustomReg(ValNo, ValVT, Reg, LocVT, LocInfo));
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State.addLoc(CCValAssign::getCustomReg(ValNo, ValVT, LoRegList[i],
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LocVT, LocInfo));
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@ -1,11 +1,29 @@
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; RUN: llc < %s -mtriple=arm-linux-gnueabi | FileCheck %s -check-prefix=ELF
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; RUN: llc < %s -mtriple=arm-apple-darwin | FileCheck %s -check-prefix=DARWIN
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; RUN: llc < %s -mtriple=arm-linux-gnueabi -mattr=+vfp2 | FileCheck %s -check-prefix=ELF
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; RUN: llc < %s -mtriple=arm-apple-darwin -mattr=+vfp2 | FileCheck %s -check-prefix=DARWIN
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define i32 @f(i32 %a, i64 %b) {
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define i32 @f1(i32 %a, i64 %b) {
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; ELF: f1:
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; ELF: mov r0, r2
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; DARWIN: f1:
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; DARWIN: mov r0, r1
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%tmp = call i32 @g(i64 %b)
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%tmp = call i32 @g1(i64 %b)
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ret i32 %tmp
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}
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declare i32 @g(i64)
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; test that allocating the double to r2/r3 makes r1 unavailable on gnueabi.
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define i32 @f2() nounwind optsize {
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; ELF: f2:
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; ELF: mov r0, #128
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; ELF: str r0, [sp]
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; DARWIN: f2:
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; DARWIN: mov r3, #128
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entry:
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%0 = tail call i32 (i32, ...)* @g2(i32 5, double 1.600000e+01, i32 128) nounwind optsize ; <i32> [#uses=1]
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%not. = icmp ne i32 %0, 128 ; <i1> [#uses=1]
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%.0 = zext i1 %not. to i32 ; <i32> [#uses=1]
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ret i32 %.0
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}
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declare i32 @g1(i64)
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declare i32 @g2(i32 %i, ...)
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