1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-19 11:02:59 +02:00

Make some intrinsics safe to speculatively execute.

llvm-svn: 147036
This commit is contained in:
Nick Lewycky 2011-12-21 05:52:02 +00:00
parent fb22f64814
commit 9adbd36737
3 changed files with 53 additions and 7 deletions

View File

@ -1912,11 +1912,31 @@ bool llvm::isSafeToSpeculativelyExecute(const Instruction *Inst,
return false;
return LI->getPointerOperand()->isDereferenceablePointer();
}
case Instruction::Call:
case Instruction::Call: {
if (const IntrinsicInst *II = dyn_cast<IntrinsicInst>(Inst)) {
switch (II->getIntrinsicID()) {
case Intrinsic::bswap:
case Intrinsic::ctlz:
case Intrinsic::ctpop:
case Intrinsic::cttz:
case Intrinsic::objectsize:
case Intrinsic::sadd_with_overflow:
case Intrinsic::smul_with_overflow:
case Intrinsic::ssub_with_overflow:
case Intrinsic::uadd_with_overflow:
case Intrinsic::umul_with_overflow:
case Intrinsic::usub_with_overflow:
return true;
// TODO: some fp intrinsics are marked as having the same error handling
// as libm. They're safe to speculate when they won't error.
// TODO: are convert_{from,to}_fp16 safe?
// TODO: can we list target-specific intrinsics here?
default: break;
}
}
return false; // The called function could have undefined behavior or
// side-effects.
// FIXME: We should special-case some intrinsics (bswap,
// overflow-checking arithmetic, etc.)
// side-effects, even if marked readnone nounwind.
}
case Instruction::VAArg:
case Instruction::Alloca:
case Instruction::Invoke:

View File

@ -293,6 +293,7 @@ static bool DominatesMergePoint(Value *V, BasicBlock *BB,
Cost = 1;
break; // These are all cheap and non-trapping instructions.
case Instruction::Call:
case Instruction::Select:
Cost = 2;
break;

View File

@ -1,7 +1,10 @@
; RUN: opt < %s -simplifycfg -S | grep select
; RUN: opt < %s -simplifycfg -S | grep br | count 2
; RUN: opt < %s -simplifycfg -phi-node-folding-threshold=2 -S | FileCheck %s
define i32 @t2(i32 %a, i32 %b, i32 %c) nounwind {
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
define i32 @test1(i32 %a, i32 %b, i32 %c) nounwind {
; CHECK: @test1
entry:
%tmp1 = icmp eq i32 %b, 0
br i1 %tmp1, label %bb1, label %bb3
@ -9,6 +12,11 @@ entry:
bb1: ; preds = %entry
%tmp2 = icmp sgt i32 %c, 1
br i1 %tmp2, label %bb2, label %bb3
; CHECK: bb1:
; CHECK-NEXT: add i32 %a, 1
; CHECK-NEXT: icmp sgt i32 %c, 1
; CHECK-NEXT: select i1 %tmp2, i32 %tmp3, i32 %a
; CHECK-NEXT: br label %bb3
bb2: ; preds = bb1
%tmp3 = add i32 %a, 1
@ -19,3 +27,20 @@ bb3: ; preds = %bb2, %entry
%tmp5 = sub i32 %tmp4, 1
ret i32 %tmp5
}
declare i8 @llvm.cttz.i8(i8, i1)
define i8 @test2(i8 %a) {
; CHECK: @test2
br i1 undef, label %bb_true, label %bb_false
bb_true:
%b = tail call i8 @llvm.cttz.i8(i8 %a, i1 false)
br label %join
bb_false:
br label %join
join:
%c = phi i8 [%b, %bb_true], [%a, %bb_false]
; CHECK: select
ret i8 %c
}