RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-19 19:12:56 +02:00
Code Issues Projects Releases Wiki Activity

[AMDGPU][MC] Enabled expressions as operands

Browse Source 
See bug 33579: https://bugs.llvm.org//show_bug.cgi?id=33579

Reviewers: vpykhtin, SamWot, arsenm

Differential Revision: https://reviews.llvm.org/D36091

llvm-svn: 310059
This commit is contained in:
Dmitry Preobrazhensky 2017-08-04 13:55:24 +00:00
parent a4f7854b25
commit 9af63453d3
3 changed files with 22 additions and 17 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

26
lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
View File

@ -2530,24 +2530,22 @@ AMDGPUAsmParser::parseOperand(OperandVector &Operands, StringRef Mnemonic) {
if (ResTy == MatchOperand_Success)
return ResTy;
if (getLexer().getKind() == AsmToken::Identifier) {
// If this identifier is a symbol, we want to create an expression for it.
// It is a little difficult to distinguish between a symbol name, and
// an instruction flag like 'gds'. In order to do this, we parse
// all tokens as expressions and then treate the symbol name as the token
// string when we want to interpret the operand as a token.
const auto &Tok = Parser.getTok();
SMLoc S = Tok.getLoc();
const MCExpr *Expr = nullptr;
if (!Parser.parseExpression(Expr)) {
Operands.push_back(AMDGPUOperand::CreateExpr(this, Expr, S));
return MatchOperand_Success;
}
const auto &Tok = Parser.getTok();
SMLoc S = Tok.getLoc();
Operands.push_back(AMDGPUOperand::CreateToken(this, Tok.getString(), Tok.getLoc()));
const MCExpr *Expr = nullptr;
if (!Parser.parseExpression(Expr)) {
Operands.push_back(AMDGPUOperand::CreateExpr(this, Expr, S));
return MatchOperand_Success;
}
// Possibly this is an instruction flag like 'gds'.
if (Tok.getKind() == AsmToken::Identifier) {
Operands.push_back(AMDGPUOperand::CreateToken(this, Tok.getString(), S));
Parser.Lex();
return MatchOperand_Success;
}
return MatchOperand_NoMatch;
}

7
test/MC/AMDGPU/expressions.s
View File

@ -39,3 +39,10 @@ s_mov_b32 s0, foo+2
.set foo, 512
s_mov_b32 s0, foo+2
// VI: s_mov_b32 s0, 514 ; encoding: [0xff,0x00,0x80,0xbe,0x02,0x02,0x00,0x00]
BB1:
v_nop_e64
BB2:
s_sub_u32 vcc_lo, vcc_lo, (BB2+4)-BB1
// VI: s_sub_u32 vcc_lo, vcc_lo, (BB2+4)-BB1 ; encoding: [0x6a,0xff,0xea,0x80,A,A,A,A]
// VI-NEXT: ; fixup A - offset: 4, value: (BB2+4)-BB1, kind: FK_Data_4

6
test/MC/AMDGPU/vop3p-err.s
View File

@ -50,13 +50,13 @@ v_pk_add_u16 v1, v2, v3 neg_lo:[0,0]
// GFX9: :18: error: not a valid operand.
v_pk_add_f16 v1, |v2|, v3
// GFX9: :21: error: not a valid operand.
// GFX9: :18: error: invalid operand for instruction
v_pk_add_f16 v1, abs(v2), v3
// GFX9: :22: error: not a valid operand.
v_pk_add_f16 v1, v2, |v3|
// GFX9: :25: error: not a valid operand.
// GFX9: :22: error: invalid operand for instruction
v_pk_add_f16 v1, v2, abs(v3)
// GFX9: :19: error: invalid operand for instruction
@ -65,7 +65,7 @@ v_pk_add_f16 v1, -v2, v3
// GFX9: :23: error: invalid operand for instruction
v_pk_add_f16 v1, v2, -v3
// GFX9: :21: error: not a valid operand.
// GFX9: :18: error: invalid operand for instruction
v_pk_add_u16 v1, abs(v2), v3
// GFX9: :19: error: invalid operand for instruction