RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-22 18:54:02 +01:00
Code Issues Projects Releases Wiki Activity

Handle lane masks in LivePhysRegs when adding live-ins

Browse Source 
Differential Revision: https://reviews.llvm.org/D25533

llvm-svn: 284076
This commit is contained in:
Krzysztof Parzyszek 2016-10-12 22:53:41 +00:00
parent 498e50998f
commit 9b355ba01b
3 changed files with 57 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
include/llvm/CodeGen/LivePhysRegs.h
View File

@ -141,6 +141,11 @@ public:
/// \brief Dumps the currently live registers to the debug output.
void dump() const;
private:
/// Adds live-in registers from basic block @p MBB, taking associated
/// lane masks into consideration.
void addBlockLiveIns(const MachineBasicBlock &MBB);
};
inline raw_ostream &operator<<(raw_ostream &OS, const LivePhysRegs& LR) {

17
lib/CodeGen/LivePhysRegs.cpp
View File

@ -141,9 +141,16 @@ bool LivePhysRegs::available(const MachineRegisterInfo &MRI,
}
/// Add live-in registers of basic block \p MBB to \p LiveRegs.
static void addLiveIns(LivePhysRegs &LiveRegs, const MachineBasicBlock &MBB) {
for (const auto &LI : MBB.liveins())
LiveRegs.addReg(LI.PhysReg);
void LivePhysRegs::addBlockLiveIns(const MachineBasicBlock &MBB) {
for (const auto &LI : MBB.liveins()) {
if (LI.LaneMask == ~0u) {
addReg(LI.PhysReg);
continue;
}
for (MCSubRegIndexIterator S(LI.PhysReg, TRI); S.isValid(); ++S)
if (LI.LaneMask & TRI->getSubRegIndexLaneMask(S.getSubRegIndex()))
addReg(S.getSubReg());
}
}
/// Add pristine registers to the given \p LiveRegs. This function removes
@ -160,7 +167,7 @@ static void addPristines(LivePhysRegs &LiveRegs, const MachineFunction &MF,
void LivePhysRegs::addLiveOutsNoPristines(const MachineBasicBlock &MBB) {
// To get the live-outs we simply merge the live-ins of all successors.
for (const MachineBasicBlock *Succ : MBB.successors())
::addLiveIns(*this, *Succ);
addBlockLiveIns(*Succ);
}
void LivePhysRegs::addLiveOuts(const MachineBasicBlock &MBB) {
@ -185,5 +192,5 @@ void LivePhysRegs::addLiveIns(const MachineBasicBlock &MBB) {
const MachineFrameInfo &MFI = MF.getFrameInfo();
if (MFI.isCalleeSavedInfoValid())
addPristines(*this, MF, MFI, *TRI);
::addLiveIns(*this, MBB);
addBlockLiveIns(MBB);
}

40
test/CodeGen/Hexagon/livephysregs-lane-masks.mir Normal file
View File

@ -0,0 +1,40 @@
# RUN: llc -march=hexagon -run-pass if-converter -verify-machineinstrs -o - %s | FileCheck %s
# CHECK-LABEL: name: foo
# CHECK: %p0 = C2_cmpeqi %r16, 0
# Make sure there is no implicit use of r1.
# CHECK: %r1 = L2_ploadruhf_io %p0, %r29, 6
--- |
define void @foo() {
ret void
}
...
---
name: foo
tracksRegLiveness: true
body: |
bb.0:
liveins: %r16
successors: %bb.1, %bb.2
%p0 = C2_cmpeqi %r16, 0
J2_jumpt %p0, %bb.2, implicit-def %pc
bb.1:
; The lane mask %d0:0002 is equivalent to %r0. LivePhysRegs would ignore
; it and treat it as the whole %d0, which is a pair %r1, %r0. The extra
; %r1 would cause an (undefined) implicit use to be added during
; if-conversion.
liveins: %d0:0x00000002, %d15:0x00000001, %r16
successors: %bb.2
%r1 = L2_loadruh_io %r29, 6
S2_storeri_io killed %r16, 0, %r1
bb.2:
liveins: %r0
%d8 = L2_loadrd_io %r29, 8
L4_return implicit-def %r29, implicit-def %r30, implicit-def %r31, implicit-def %pc, implicit %r30