mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-11-24 11:42:57 +01:00
[GISel] Pass MD_callees metadata down in call lowering.
Summary: This will make it possible to improve IPRA by taking into account register usage in indirect calls. NFC yet; this is just laying the groundwork to start building up patches to take advantage of the information for improved register allocation. Reviewers: aditya_nandakumar, volkan, qcolombet, arsenm, rovka, aemerson, paquette Subscribers: sdardis, wdng, javed.absar, hiraditya, jrtc27, atanasyan, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D65488 llvm-svn: 367476
This commit is contained in:
parent
4385b79373
commit
9c08fd02aa
@ -240,11 +240,12 @@ public:
|
||||
/// \return true if the lowering succeeded, false otherwise.
|
||||
virtual bool lowerCall(MachineIRBuilder &MIRBuilder, CallingConv::ID CallConv,
|
||||
const MachineOperand &Callee, const ArgInfo &OrigRet,
|
||||
ArrayRef<ArgInfo> OrigArgs,
|
||||
Register SwiftErrorVReg) const {
|
||||
ArrayRef<ArgInfo> OrigArgs, Register SwiftErrorVReg,
|
||||
const MDNode *KnownCallees = nullptr) const {
|
||||
if (!supportSwiftError()) {
|
||||
assert(SwiftErrorVReg == 0 && "trying to use unsupported swifterror");
|
||||
return lowerCall(MIRBuilder, CallConv, Callee, OrigRet, OrigArgs);
|
||||
return lowerCall(MIRBuilder, CallConv, Callee, OrigRet, OrigArgs,
|
||||
KnownCallees);
|
||||
}
|
||||
return false;
|
||||
}
|
||||
@ -253,7 +254,8 @@ public:
|
||||
/// do not support swifterror value promotion.
|
||||
virtual bool lowerCall(MachineIRBuilder &MIRBuilder, CallingConv::ID CallConv,
|
||||
const MachineOperand &Callee, const ArgInfo &OrigRet,
|
||||
ArrayRef<ArgInfo> OrigArgs) const {
|
||||
ArrayRef<ArgInfo> OrigArgs,
|
||||
const MDNode *KnownCallees = nullptr) const {
|
||||
return false;
|
||||
}
|
||||
|
||||
|
@ -19,6 +19,7 @@
|
||||
#include "llvm/CodeGen/TargetLowering.h"
|
||||
#include "llvm/IR/DataLayout.h"
|
||||
#include "llvm/IR/Instructions.h"
|
||||
#include "llvm/IR/LLVMContext.h"
|
||||
#include "llvm/IR/Module.h"
|
||||
|
||||
#define DEBUG_TYPE "call-lowering"
|
||||
@ -61,8 +62,11 @@ bool CallLowering::lowerCall(MachineIRBuilder &MIRBuilder, ImmutableCallSite CS,
|
||||
if (!OrigRet.Ty->isVoidTy())
|
||||
setArgFlags(OrigRet, AttributeList::ReturnIndex, DL, CS);
|
||||
|
||||
const MDNode *KnownCallees =
|
||||
CS.getInstruction()->getMetadata(LLVMContext::MD_callees);
|
||||
|
||||
return lowerCall(MIRBuilder, CS.getCallingConv(), Callee, OrigRet, OrigArgs,
|
||||
SwiftErrorVReg);
|
||||
SwiftErrorVReg, KnownCallees);
|
||||
}
|
||||
|
||||
template <typename FuncInfoTy>
|
||||
|
@ -406,7 +406,8 @@ bool AArch64CallLowering::lowerCall(MachineIRBuilder &MIRBuilder,
|
||||
const MachineOperand &Callee,
|
||||
const ArgInfo &OrigRet,
|
||||
ArrayRef<ArgInfo> OrigArgs,
|
||||
Register SwiftErrorVReg) const {
|
||||
Register SwiftErrorVReg,
|
||||
const MDNode *KnownCallees) const {
|
||||
MachineFunction &MF = MIRBuilder.getMF();
|
||||
const Function &F = MF.getFunction();
|
||||
MachineRegisterInfo &MRI = MF.getRegInfo();
|
||||
|
@ -42,13 +42,15 @@ public:
|
||||
|
||||
bool lowerCall(MachineIRBuilder &MIRBuilder, CallingConv::ID CallConv,
|
||||
const MachineOperand &Callee, const ArgInfo &OrigRet,
|
||||
ArrayRef<ArgInfo> OrigArgs,
|
||||
Register SwiftErrorVReg) const override;
|
||||
ArrayRef<ArgInfo> OrigArgs, Register SwiftErrorVReg,
|
||||
const MDNode *KnownCallees) const override;
|
||||
|
||||
bool lowerCall(MachineIRBuilder &MIRBuilder, CallingConv::ID CallConv,
|
||||
const MachineOperand &Callee, const ArgInfo &OrigRet,
|
||||
ArrayRef<ArgInfo> OrigArgs) const override {
|
||||
return lowerCall(MIRBuilder, CallConv, Callee, OrigRet, OrigArgs, 0);
|
||||
ArrayRef<ArgInfo> OrigArgs,
|
||||
const MDNode *KnownCallees) const override {
|
||||
return lowerCall(MIRBuilder, CallConv, Callee, OrigRet, OrigArgs, 0,
|
||||
KnownCallees);
|
||||
}
|
||||
|
||||
bool supportSwiftError() const override { return true; }
|
||||
|
@ -502,7 +502,8 @@ bool ARMCallLowering::lowerCall(MachineIRBuilder &MIRBuilder,
|
||||
CallingConv::ID CallConv,
|
||||
const MachineOperand &Callee,
|
||||
const ArgInfo &OrigRet,
|
||||
ArrayRef<ArgInfo> OrigArgs) const {
|
||||
ArrayRef<ArgInfo> OrigArgs,
|
||||
const MDNode *KnownCallees) const {
|
||||
MachineFunction &MF = MIRBuilder.getMF();
|
||||
const auto &TLI = *getTLI<ARMTargetLowering>();
|
||||
const auto &DL = MF.getDataLayout();
|
||||
|
@ -40,7 +40,8 @@ public:
|
||||
|
||||
bool lowerCall(MachineIRBuilder &MIRBuilder, CallingConv::ID CallConv,
|
||||
const MachineOperand &Callee, const ArgInfo &OrigRet,
|
||||
ArrayRef<ArgInfo> OrigArgs) const override;
|
||||
ArrayRef<ArgInfo> OrigArgs,
|
||||
const MDNode *KnownCallees) const override;
|
||||
|
||||
private:
|
||||
bool lowerReturnVal(MachineIRBuilder &MIRBuilder, const Value *Val,
|
||||
|
@ -502,7 +502,8 @@ bool MipsCallLowering::lowerCall(MachineIRBuilder &MIRBuilder,
|
||||
CallingConv::ID CallConv,
|
||||
const MachineOperand &Callee,
|
||||
const ArgInfo &OrigRet,
|
||||
ArrayRef<ArgInfo> OrigArgs) const {
|
||||
ArrayRef<ArgInfo> OrigArgs,
|
||||
const MDNode *KnownCallees) const {
|
||||
|
||||
if (CallConv != CallingConv::C)
|
||||
return false;
|
||||
|
@ -70,7 +70,8 @@ public:
|
||||
|
||||
bool lowerCall(MachineIRBuilder &MIRBuilder, CallingConv::ID CallConv,
|
||||
const MachineOperand &Callee, const ArgInfo &OrigRet,
|
||||
ArrayRef<ArgInfo> OrigArgs) const override;
|
||||
ArrayRef<ArgInfo> OrigArgs,
|
||||
const MDNode *KnownCallees) const override;
|
||||
|
||||
private:
|
||||
/// Based on registers available on target machine split or extend
|
||||
|
@ -375,7 +375,8 @@ bool X86CallLowering::lowerCall(MachineIRBuilder &MIRBuilder,
|
||||
CallingConv::ID CallConv,
|
||||
const MachineOperand &Callee,
|
||||
const ArgInfo &OrigRet,
|
||||
ArrayRef<ArgInfo> OrigArgs) const {
|
||||
ArrayRef<ArgInfo> OrigArgs,
|
||||
const MDNode *KnownCallees) const {
|
||||
MachineFunction &MF = MIRBuilder.getMF();
|
||||
const Function &F = MF.getFunction();
|
||||
MachineRegisterInfo &MRI = MF.getRegInfo();
|
||||
|
@ -36,7 +36,8 @@ public:
|
||||
|
||||
bool lowerCall(MachineIRBuilder &MIRBuilder, CallingConv::ID CallConv,
|
||||
const MachineOperand &Callee, const ArgInfo &OrigRet,
|
||||
ArrayRef<ArgInfo> OrigArgs) const override;
|
||||
ArrayRef<ArgInfo> OrigArgs,
|
||||
const MDNode *KnownCallees) const override;
|
||||
|
||||
private:
|
||||
/// A function of this type is used to perform value split action.
|
||||
|
Loading…
Reference in New Issue
Block a user