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[GISel] Pass MD_callees metadata down in call lowering.

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Summary:
This will make it possible to improve IPRA by taking into account
register usage in indirect calls.

NFC yet; this is just laying the groundwork to start building
up patches to take advantage of the information for improved register
allocation.

Reviewers: aditya_nandakumar, volkan, qcolombet, arsenm, rovka, aemerson, paquette

Subscribers: sdardis, wdng, javed.absar, hiraditya, jrtc27, atanasyan, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D65488

llvm-svn: 367476
This commit is contained in:
Mark Lacey 2019-07-31 20:34:02 +00:00
parent 4385b79373
commit 9c08fd02aa
10 changed files with 31 additions and 16 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
include/llvm/CodeGen/GlobalISel/CallLowering.h
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@ -240,11 +240,12 @@ public:
/// \return true if the lowering succeeded, false otherwise. /// \return true if the lowering succeeded, false otherwise.
virtual bool lowerCall(MachineIRBuilder &MIRBuilder, CallingConv::ID CallConv, virtual bool lowerCall(MachineIRBuilder &MIRBuilder, CallingConv::ID CallConv,
const MachineOperand &Callee, const ArgInfo &OrigRet, const MachineOperand &Callee, const ArgInfo &OrigRet,
ArrayRef<ArgInfo> OrigArgs, ArrayRef<ArgInfo> OrigArgs, Register SwiftErrorVReg,
Register SwiftErrorVReg) const { const MDNode *KnownCallees = nullptr) const {
if (!supportSwiftError()) { if (!supportSwiftError()) {
assert(SwiftErrorVReg == 0 && "trying to use unsupported swifterror"); assert(SwiftErrorVReg == 0 && "trying to use unsupported swifterror");
return lowerCall(MIRBuilder, CallConv, Callee, OrigRet, OrigArgs); return lowerCall(MIRBuilder, CallConv, Callee, OrigRet, OrigArgs,
KnownCallees);
} }
return false; return false;
} }
@ -253,7 +254,8 @@ public:
/// do not support swifterror value promotion. /// do not support swifterror value promotion.
virtual bool lowerCall(MachineIRBuilder &MIRBuilder, CallingConv::ID CallConv, virtual bool lowerCall(MachineIRBuilder &MIRBuilder, CallingConv::ID CallConv,
const MachineOperand &Callee, const ArgInfo &OrigRet, const MachineOperand &Callee, const ArgInfo &OrigRet,
ArrayRef<ArgInfo> OrigArgs) const { ArrayRef<ArgInfo> OrigArgs,
const MDNode *KnownCallees = nullptr) const {
return false; return false;
} }

6
lib/CodeGen/GlobalISel/CallLowering.cpp
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@ -19,6 +19,7 @@
#include "llvm/CodeGen/TargetLowering.h" #include "llvm/CodeGen/TargetLowering.h"
#include "llvm/IR/DataLayout.h" #include "llvm/IR/DataLayout.h"
#include "llvm/IR/Instructions.h" #include "llvm/IR/Instructions.h"
#include "llvm/IR/LLVMContext.h"
#include "llvm/IR/Module.h" #include "llvm/IR/Module.h"
#define DEBUG_TYPE "call-lowering" #define DEBUG_TYPE "call-lowering"
@ -61,8 +62,11 @@ bool CallLowering::lowerCall(MachineIRBuilder &MIRBuilder, ImmutableCallSite CS,
if (!OrigRet.Ty->isVoidTy()) if (!OrigRet.Ty->isVoidTy())
setArgFlags(OrigRet, AttributeList::ReturnIndex, DL, CS); setArgFlags(OrigRet, AttributeList::ReturnIndex, DL, CS);
const MDNode *KnownCallees =
CS.getInstruction()->getMetadata(LLVMContext::MD_callees);
return lowerCall(MIRBuilder, CS.getCallingConv(), Callee, OrigRet, OrigArgs, return lowerCall(MIRBuilder, CS.getCallingConv(), Callee, OrigRet, OrigArgs,
SwiftErrorVReg); SwiftErrorVReg, KnownCallees);
} }
template <typename FuncInfoTy> template <typename FuncInfoTy>

3
lib/Target/AArch64/AArch64CallLowering.cpp
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@ -406,7 +406,8 @@ bool AArch64CallLowering::lowerCall(MachineIRBuilder &MIRBuilder,
const MachineOperand &Callee, const MachineOperand &Callee,
const ArgInfo &OrigRet, const ArgInfo &OrigRet,
ArrayRef<ArgInfo> OrigArgs, ArrayRef<ArgInfo> OrigArgs,
Register SwiftErrorVReg) const { Register SwiftErrorVReg,
const MDNode *KnownCallees) const {
MachineFunction &MF = MIRBuilder.getMF(); MachineFunction &MF = MIRBuilder.getMF();
const Function &F = MF.getFunction(); const Function &F = MF.getFunction();
MachineRegisterInfo &MRI = MF.getRegInfo(); MachineRegisterInfo &MRI = MF.getRegInfo();

10
lib/Target/AArch64/AArch64CallLowering.h
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@ -42,13 +42,15 @@ public:
bool lowerCall(MachineIRBuilder &MIRBuilder, CallingConv::ID CallConv, bool lowerCall(MachineIRBuilder &MIRBuilder, CallingConv::ID CallConv,
const MachineOperand &Callee, const ArgInfo &OrigRet, const MachineOperand &Callee, const ArgInfo &OrigRet,
ArrayRef<ArgInfo> OrigArgs, ArrayRef<ArgInfo> OrigArgs, Register SwiftErrorVReg,
Register SwiftErrorVReg) const override; const MDNode *KnownCallees) const override;
bool lowerCall(MachineIRBuilder &MIRBuilder, CallingConv::ID CallConv, bool lowerCall(MachineIRBuilder &MIRBuilder, CallingConv::ID CallConv,
const MachineOperand &Callee, const ArgInfo &OrigRet, const MachineOperand &Callee, const ArgInfo &OrigRet,
ArrayRef<ArgInfo> OrigArgs) const override { ArrayRef<ArgInfo> OrigArgs,
return lowerCall(MIRBuilder, CallConv, Callee, OrigRet, OrigArgs, 0); const MDNode *KnownCallees) const override {
return lowerCall(MIRBuilder, CallConv, Callee, OrigRet, OrigArgs, 0,
KnownCallees);
} }
bool supportSwiftError() const override { return true; } bool supportSwiftError() const override { return true; }

3
lib/Target/ARM/ARMCallLowering.cpp
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@ -502,7 +502,8 @@ bool ARMCallLowering::lowerCall(MachineIRBuilder &MIRBuilder,
CallingConv::ID CallConv, CallingConv::ID CallConv,
const MachineOperand &Callee, const MachineOperand &Callee,
const ArgInfo &OrigRet, const ArgInfo &OrigRet,
ArrayRef<ArgInfo> OrigArgs) const { ArrayRef<ArgInfo> OrigArgs,
const MDNode *KnownCallees) const {
MachineFunction &MF = MIRBuilder.getMF(); MachineFunction &MF = MIRBuilder.getMF();
const auto &TLI = *getTLI<ARMTargetLowering>(); const auto &TLI = *getTLI<ARMTargetLowering>();
const auto &DL = MF.getDataLayout(); const auto &DL = MF.getDataLayout();

3
lib/Target/ARM/ARMCallLowering.h
View File

@ -40,7 +40,8 @@ public:
bool lowerCall(MachineIRBuilder &MIRBuilder, CallingConv::ID CallConv, bool lowerCall(MachineIRBuilder &MIRBuilder, CallingConv::ID CallConv,
const MachineOperand &Callee, const ArgInfo &OrigRet, const MachineOperand &Callee, const ArgInfo &OrigRet,
ArrayRef<ArgInfo> OrigArgs) const override; ArrayRef<ArgInfo> OrigArgs,
const MDNode *KnownCallees) const override;
private: private:
bool lowerReturnVal(MachineIRBuilder &MIRBuilder, const Value *Val, bool lowerReturnVal(MachineIRBuilder &MIRBuilder, const Value *Val,

3
lib/Target/Mips/MipsCallLowering.cpp
View File

@ -502,7 +502,8 @@ bool MipsCallLowering::lowerCall(MachineIRBuilder &MIRBuilder,
CallingConv::ID CallConv, CallingConv::ID CallConv,
const MachineOperand &Callee, const MachineOperand &Callee,
const ArgInfo &OrigRet, const ArgInfo &OrigRet,
ArrayRef<ArgInfo> OrigArgs) const { ArrayRef<ArgInfo> OrigArgs,
const MDNode *KnownCallees) const {
if (CallConv != CallingConv::C) if (CallConv != CallingConv::C)
return false; return false;

3
lib/Target/Mips/MipsCallLowering.h
View File

@ -70,7 +70,8 @@ public:
bool lowerCall(MachineIRBuilder &MIRBuilder, CallingConv::ID CallConv, bool lowerCall(MachineIRBuilder &MIRBuilder, CallingConv::ID CallConv,
const MachineOperand &Callee, const ArgInfo &OrigRet, const MachineOperand &Callee, const ArgInfo &OrigRet,
ArrayRef<ArgInfo> OrigArgs) const override; ArrayRef<ArgInfo> OrigArgs,
const MDNode *KnownCallees) const override;
private: private:
/// Based on registers available on target machine split or extend /// Based on registers available on target machine split or extend

3
lib/Target/X86/X86CallLowering.cpp
View File

@ -375,7 +375,8 @@ bool X86CallLowering::lowerCall(MachineIRBuilder &MIRBuilder,
CallingConv::ID CallConv, CallingConv::ID CallConv,
const MachineOperand &Callee, const MachineOperand &Callee,
const ArgInfo &OrigRet, const ArgInfo &OrigRet,
ArrayRef<ArgInfo> OrigArgs) const { ArrayRef<ArgInfo> OrigArgs,
const MDNode *KnownCallees) const {
MachineFunction &MF = MIRBuilder.getMF(); MachineFunction &MF = MIRBuilder.getMF();
const Function &F = MF.getFunction(); const Function &F = MF.getFunction();
MachineRegisterInfo &MRI = MF.getRegInfo(); MachineRegisterInfo &MRI = MF.getRegInfo();

3
lib/Target/X86/X86CallLowering.h
View File

@ -36,7 +36,8 @@ public:
bool lowerCall(MachineIRBuilder &MIRBuilder, CallingConv::ID CallConv, bool lowerCall(MachineIRBuilder &MIRBuilder, CallingConv::ID CallConv,
const MachineOperand &Callee, const ArgInfo &OrigRet, const MachineOperand &Callee, const ArgInfo &OrigRet,
ArrayRef<ArgInfo> OrigArgs) const override; ArrayRef<ArgInfo> OrigArgs,
const MDNode *KnownCallees) const override;
private: private:
/// A function of this type is used to perform value split action. /// A function of this type is used to perform value split action.