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Implement AArch64 Neon instruction set Perm.
llvm-svn: 194123
This commit is contained in:
Jiangning Liu
parent
1cdd311f06
commit
9c0eb8e7ba
@ -1001,6 +1001,24 @@ class NeonI_BitExtract<bit q, bits<2> op2,
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// Inherit Rd in 4-0
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}
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// Format AdvSIMD perm
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class NeonI_Perm<bit q, bits<2> size, bits<3> opcode,
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dag outs, dag ins, string asmstr,
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list<dag> patterns, InstrItinClass itin>
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: A64InstRdnm<outs, ins, asmstr, patterns, itin> {
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let Inst{31} = 0b0;
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let Inst{30} = q;
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let Inst{29-24} = 0b001110;
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let Inst{23-22} = size;
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let Inst{21} = 0b0;
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// Inherit Rm in 20-16
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let Inst{15} = 0b0;
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let Inst{14-12} = opcode;
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let Inst{11-10} = 0b10;
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// Inherit Rn in 9-5
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// Inherit Rd in 4-0
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}
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// Format AdvSIMD 3 vector registers with same vector type
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class NeonI_3VSame<bit q, bit u, bits<2> size, bits<5> opcode,
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dag outs, dag ins, string asmstr,
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@ -2360,6 +2360,335 @@ defm FMAXV : NeonI_2VAcross_3<0b1, 0b01111, 0b00, "fmaxv",
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defm FMINV : NeonI_2VAcross_3<0b1, 0b01111, 0b10, "fminv",
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int_aarch64_neon_vminv>;
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// The followings are for instruction class (Perm)
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class NeonI_Permute<bit q, bits<2> size, bits<3> opcode,
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string asmop, RegisterOperand OpVPR, string OpS>
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: NeonI_Perm<q, size, opcode,
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(outs OpVPR:$Rd), (ins OpVPR:$Rn, OpVPR:$Rm),
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asmop # "\t$Rd." # OpS # ", $Rn." # OpS # ", $Rm." # OpS,
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[], NoItinerary>;
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multiclass NeonI_Perm_pat<bits<3> opcode, string asmop> {
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def _8b : NeonI_Permute<0b0, 0b00, opcode, asmop, VPR64, "8b">;
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def _16b : NeonI_Permute<0b1, 0b00, opcode, asmop, VPR128, "16b">;
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def _4h : NeonI_Permute<0b0, 0b01, opcode, asmop, VPR64, "4h">;
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def _8h : NeonI_Permute<0b1, 0b01, opcode, asmop, VPR128, "8h">;
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def _2s : NeonI_Permute<0b0, 0b10, opcode, asmop, VPR64, "2s">;
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def _4s : NeonI_Permute<0b1, 0b10, opcode, asmop, VPR128, "4s">;
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def _2d : NeonI_Permute<0b1, 0b11, opcode, asmop, VPR128, "2d">;
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}
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defm UZP1vvv : NeonI_Perm_pat<0b001, "uzp1">;
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defm TRN1vvv : NeonI_Perm_pat<0b010, "trn1">;
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defm ZIP1vvv : NeonI_Perm_pat<0b011, "zip1">;
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defm UZP2vvv : NeonI_Perm_pat<0b101, "uzp2">;
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defm TRN2vvv : NeonI_Perm_pat<0b110, "trn2">;
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defm ZIP2vvv : NeonI_Perm_pat<0b111, "zip2">;
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// Extract and Insert
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def NI_ei_i32 : PatFrag<(ops node:$Rn, node:$Rm, node:$Ext, node:$Ins),
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(vector_insert node:$Rn,
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(i32 (vector_extract node:$Rm, node:$Ext)),
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node:$Ins)>;
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def NI_ei_f32 : PatFrag<(ops node:$Rn, node:$Rm, node:$Ext, node:$Ins),
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(vector_insert node:$Rn,
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(f32 (vector_extract node:$Rm, node:$Ext)),
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node:$Ins)>;
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// uzp1
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def : Pat<(v16i8 (NI_ei_i32 (v16i8 (NI_ei_i32 (v16i8 (NI_ei_i32
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(v16i8 (NI_ei_i32 (v16i8 (NI_ei_i32 (v16i8 (NI_ei_i32
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(v16i8 (NI_ei_i32 (v16i8 (NI_ei_i32 (v16i8 (NI_ei_i32
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(v16i8 (NI_ei_i32 (v16i8 (NI_ei_i32 (v16i8 (NI_ei_i32
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(v16i8 (NI_ei_i32 (v16i8 (NI_ei_i32 (v16i8 (NI_ei_i32
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(v16i8 VPR128:$Rn),
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(v16i8 VPR128:$Rn), 2, 1)),
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(v16i8 VPR128:$Rn), 4, 2)),
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(v16i8 VPR128:$Rn), 6, 3)),
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(v16i8 VPR128:$Rn), 8, 4)),
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(v16i8 VPR128:$Rn), 10, 5)),
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(v16i8 VPR128:$Rn), 12, 6)),
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(v16i8 VPR128:$Rn), 14, 7)),
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(v16i8 VPR128:$Rm), 0, 8)),
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(v16i8 VPR128:$Rm), 2, 9)),
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(v16i8 VPR128:$Rm), 4, 10)),
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(v16i8 VPR128:$Rm), 6, 11)),
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(v16i8 VPR128:$Rm), 8, 12)),
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(v16i8 VPR128:$Rm), 10, 13)),
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(v16i8 VPR128:$Rm), 12, 14)),
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(v16i8 VPR128:$Rm), 14, 15)),
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(UZP1vvv_16b VPR128:$Rn, VPR128:$Rm)>;
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class NI_Uzp1_v8<ValueType Ty, RegisterOperand VPR, Instruction INST>
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: Pat<(Ty (NI_ei_i32 (Ty (NI_ei_i32 (Ty (NI_ei_i32 (Ty (NI_ei_i32
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(Ty (NI_ei_i32 (Ty (NI_ei_i32 (Ty (NI_ei_i32
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(Ty VPR:$Rn),
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(Ty VPR:$Rn), 2, 1)),
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(Ty VPR:$Rn), 4, 2)),
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(Ty VPR:$Rn), 6, 3)),
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(Ty VPR:$Rm), 0, 4)),
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(Ty VPR:$Rm), 2, 5)),
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(Ty VPR:$Rm), 4, 6)),
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(Ty VPR:$Rm), 6, 7)),
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(INST VPR:$Rn, VPR:$Rm)>;
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def : NI_Uzp1_v8<v8i8, VPR64, UZP1vvv_8b>;
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def : NI_Uzp1_v8<v8i16, VPR128, UZP1vvv_8h>;
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class NI_Uzp1_v4<ValueType Ty, RegisterOperand VPR, Instruction INST,
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PatFrag ei>
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: Pat<(Ty (ei (Ty (ei (Ty (ei
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(Ty VPR:$Rn),
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(Ty VPR:$Rn), 2, 1)),
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(Ty VPR:$Rm), 0, 2)),
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(Ty VPR:$Rm), 2, 3)),
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(INST VPR:$Rn, VPR:$Rm)>;
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def : NI_Uzp1_v4<v4i16, VPR64, UZP1vvv_4h, NI_ei_i32>;
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def : NI_Uzp1_v4<v4i32, VPR128, UZP1vvv_4s, NI_ei_i32>;
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def : NI_Uzp1_v4<v4f32, VPR128, UZP1vvv_4s, NI_ei_f32>;
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// uzp2
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def : Pat<(v16i8 (NI_ei_i32 (v16i8 (NI_ei_i32 (v16i8 (NI_ei_i32
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(v16i8 (NI_ei_i32 (v16i8 (NI_ei_i32 (v16i8 (NI_ei_i32
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(v16i8 (NI_ei_i32 (v16i8 (NI_ei_i32 (v16i8 (NI_ei_i32
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(v16i8 (NI_ei_i32 (v16i8 (NI_ei_i32 (v16i8 (NI_ei_i32
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(v16i8 (NI_ei_i32 (v16i8 (NI_ei_i32 (v16i8 (NI_ei_i32
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(v16i8 VPR128:$Rm),
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(v16i8 VPR128:$Rn), 1, 0)),
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(v16i8 VPR128:$Rn), 3, 1)),
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(v16i8 VPR128:$Rn), 5, 2)),
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(v16i8 VPR128:$Rn), 7, 3)),
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(v16i8 VPR128:$Rn), 9, 4)),
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(v16i8 VPR128:$Rn), 11, 5)),
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(v16i8 VPR128:$Rn), 13, 6)),
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(v16i8 VPR128:$Rn), 15, 7)),
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(v16i8 VPR128:$Rm), 1, 8)),
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(v16i8 VPR128:$Rm), 3, 9)),
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(v16i8 VPR128:$Rm), 5, 10)),
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(v16i8 VPR128:$Rm), 7, 11)),
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(v16i8 VPR128:$Rm), 9, 12)),
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(v16i8 VPR128:$Rm), 11, 13)),
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(v16i8 VPR128:$Rm), 13, 14)),
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(UZP2vvv_16b VPR128:$Rn, VPR128:$Rm)>;
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class NI_Uzp2_v8<ValueType Ty, RegisterOperand VPR, Instruction INST>
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: Pat<(Ty (NI_ei_i32 (Ty (NI_ei_i32 (Ty (NI_ei_i32 (Ty (NI_ei_i32
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(Ty (NI_ei_i32 (Ty (NI_ei_i32 (Ty (NI_ei_i32
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(Ty VPR:$Rm),
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(Ty VPR:$Rn), 1, 0)),
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(Ty VPR:$Rn), 3, 1)),
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(Ty VPR:$Rn), 5, 2)),
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(Ty VPR:$Rn), 7, 3)),
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(Ty VPR:$Rm), 1, 4)),
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(Ty VPR:$Rm), 3, 5)),
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(Ty VPR:$Rm), 5, 6)),
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(INST VPR:$Rn, VPR:$Rm)>;
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def : NI_Uzp2_v8<v8i8, VPR64, UZP2vvv_8b>;
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def : NI_Uzp2_v8<v8i16, VPR128, UZP2vvv_8h>;
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class NI_Uzp2_v4<ValueType Ty, RegisterOperand VPR, Instruction INST,
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PatFrag ei>
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: Pat<(Ty (ei (Ty (ei (Ty (ei
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(Ty VPR:$Rm),
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(Ty VPR:$Rn), 1, 0)),
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(Ty VPR:$Rn), 3, 1)),
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(Ty VPR:$Rm), 1, 2)),
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(INST VPR:$Rn, VPR:$Rm)>;
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def : NI_Uzp2_v4<v4i16, VPR64, UZP2vvv_4h, NI_ei_i32>;
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def : NI_Uzp2_v4<v4i32, VPR128, UZP2vvv_4s, NI_ei_i32>;
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def : NI_Uzp2_v4<v4f32, VPR128, UZP2vvv_4s, NI_ei_f32>;
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// zip1
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def : Pat<(v16i8 (NI_ei_i32 (v16i8 (NI_ei_i32 (v16i8 (NI_ei_i32
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(v16i8 (NI_ei_i32 (v16i8 (NI_ei_i32 (v16i8 (NI_ei_i32
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(v16i8 (NI_ei_i32 (v16i8 (NI_ei_i32 (v16i8 (NI_ei_i32
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(v16i8 (NI_ei_i32 (v16i8 (NI_ei_i32 (v16i8 (NI_ei_i32
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(v16i8 (NI_ei_i32 (v16i8 (NI_ei_i32 (v16i8 (NI_ei_i32
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(v16i8 VPR128:$Rn),
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(v16i8 VPR128:$Rm), 0, 1)),
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(v16i8 VPR128:$Rn), 1, 2)),
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(v16i8 VPR128:$Rm), 1, 3)),
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(v16i8 VPR128:$Rn), 2, 4)),
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(v16i8 VPR128:$Rm), 2, 5)),
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(v16i8 VPR128:$Rn), 3, 6)),
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(v16i8 VPR128:$Rm), 3, 7)),
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(v16i8 VPR128:$Rn), 4, 8)),
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(v16i8 VPR128:$Rm), 4, 9)),
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(v16i8 VPR128:$Rn), 5, 10)),
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(v16i8 VPR128:$Rm), 5, 11)),
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(v16i8 VPR128:$Rn), 6, 12)),
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(v16i8 VPR128:$Rm), 6, 13)),
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(v16i8 VPR128:$Rn), 7, 14)),
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(v16i8 VPR128:$Rm), 7, 15)),
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(ZIP1vvv_16b VPR128:$Rn, VPR128:$Rm)>;
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class NI_Zip1_v8<ValueType Ty, RegisterOperand VPR, Instruction INST>
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: Pat<(Ty (NI_ei_i32 (Ty (NI_ei_i32 (Ty (NI_ei_i32 (Ty (NI_ei_i32
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(Ty (NI_ei_i32 (Ty (NI_ei_i32 (Ty (NI_ei_i32
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(Ty VPR:$Rn),
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(Ty VPR:$Rm), 0, 1)),
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(Ty VPR:$Rn), 1, 2)),
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(Ty VPR:$Rm), 1, 3)),
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(Ty VPR:$Rn), 2, 4)),
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(Ty VPR:$Rm), 2, 5)),
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(Ty VPR:$Rn), 3, 6)),
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(Ty VPR:$Rm), 3, 7)),
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(INST VPR:$Rn, VPR:$Rm)>;
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def : NI_Zip1_v8<v8i8, VPR64, ZIP1vvv_8b>;
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def : NI_Zip1_v8<v8i16, VPR128, ZIP1vvv_8h>;
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class NI_Zip1_v4<ValueType Ty, RegisterOperand VPR, Instruction INST,
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PatFrag ei>
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: Pat<(Ty (ei (Ty (ei (Ty (ei
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(Ty VPR:$Rn),
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(Ty VPR:$Rm), 0, 1)),
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(Ty VPR:$Rn), 1, 2)),
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(Ty VPR:$Rm), 1, 3)),
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(INST VPR:$Rn, VPR:$Rm)>;
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def : NI_Zip1_v4<v4i16, VPR64, ZIP1vvv_4h, NI_ei_i32>;
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def : NI_Zip1_v4<v4i32, VPR128, ZIP1vvv_4s, NI_ei_i32>;
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def : NI_Zip1_v4<v4f32, VPR128, ZIP1vvv_4s, NI_ei_f32>;
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// zip2
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def : Pat<(v16i8 (NI_ei_i32 (v16i8 (NI_ei_i32 (v16i8 (NI_ei_i32
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(v16i8 (NI_ei_i32 (v16i8 (NI_ei_i32 (v16i8 (NI_ei_i32
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(v16i8 (NI_ei_i32 (v16i8 (NI_ei_i32 (v16i8 (NI_ei_i32
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(v16i8 (NI_ei_i32 (v16i8 (NI_ei_i32 (v16i8 (NI_ei_i32
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(v16i8 (NI_ei_i32 (v16i8 (NI_ei_i32 (v16i8 (NI_ei_i32
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(v16i8 VPR128:$Rm),
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(v16i8 VPR128:$Rn), 8, 0)),
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(v16i8 VPR128:$Rm), 8, 1)),
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(v16i8 VPR128:$Rn), 9, 2)),
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(v16i8 VPR128:$Rm), 9, 3)),
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(v16i8 VPR128:$Rn), 10, 4)),
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(v16i8 VPR128:$Rm), 10, 5)),
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(v16i8 VPR128:$Rn), 11, 6)),
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(v16i8 VPR128:$Rm), 11, 7)),
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(v16i8 VPR128:$Rn), 12, 8)),
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(v16i8 VPR128:$Rm), 12, 9)),
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(v16i8 VPR128:$Rn), 13, 10)),
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(v16i8 VPR128:$Rm), 13, 11)),
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(v16i8 VPR128:$Rn), 14, 12)),
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(v16i8 VPR128:$Rm), 14, 13)),
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(v16i8 VPR128:$Rn), 15, 14)),
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(ZIP2vvv_16b VPR128:$Rn, VPR128:$Rm)>;
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class NI_Zip2_v8<ValueType Ty, RegisterOperand VPR, Instruction INST>
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: Pat<(Ty (NI_ei_i32 (Ty (NI_ei_i32 (Ty (NI_ei_i32 (Ty (NI_ei_i32
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(Ty (NI_ei_i32 (Ty (NI_ei_i32 (Ty (NI_ei_i32
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(Ty VPR:$Rm),
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(Ty VPR:$Rn), 4, 0)),
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(Ty VPR:$Rm), 4, 1)),
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(Ty VPR:$Rn), 5, 2)),
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(Ty VPR:$Rm), 5, 3)),
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(Ty VPR:$Rn), 6, 4)),
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(Ty VPR:$Rm), 6, 5)),
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(Ty VPR:$Rn), 7, 6)),
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(INST VPR:$Rn, VPR:$Rm)>;
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def : NI_Zip2_v8<v8i8, VPR64, ZIP2vvv_8b>;
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def : NI_Zip2_v8<v8i16, VPR128, ZIP2vvv_8h>;
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class NI_Zip2_v4<ValueType Ty, RegisterOperand VPR, Instruction INST,
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PatFrag ei>
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: Pat<(Ty (ei (Ty (ei (Ty (ei
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(Ty VPR:$Rm),
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(Ty VPR:$Rn), 2, 0)),
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(Ty VPR:$Rm), 2, 1)),
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(Ty VPR:$Rn), 3, 2)),
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(INST VPR:$Rn, VPR:$Rm)>;
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def : NI_Zip2_v4<v4i16, VPR64, ZIP2vvv_4h, NI_ei_i32>;
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def : NI_Zip2_v4<v4i32, VPR128, ZIP2vvv_4s, NI_ei_i32>;
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def : NI_Zip2_v4<v4f32, VPR128, ZIP2vvv_4s, NI_ei_f32>;
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// trn1
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def : Pat<(v16i8 (NI_ei_i32 (v16i8 (NI_ei_i32 (v16i8 (NI_ei_i32
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(v16i8 (NI_ei_i32 (v16i8 (NI_ei_i32 (v16i8 (NI_ei_i32
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(v16i8 (NI_ei_i32 (v16i8 (NI_ei_i32
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(v16i8 VPR128:$Rn),
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(v16i8 VPR128:$Rm), 0, 1)),
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(v16i8 VPR128:$Rm), 2, 3)),
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(v16i8 VPR128:$Rm), 4, 5)),
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(v16i8 VPR128:$Rm), 6, 7)),
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(v16i8 VPR128:$Rm), 8, 9)),
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(v16i8 VPR128:$Rm), 10, 11)),
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(v16i8 VPR128:$Rm), 12, 13)),
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(v16i8 VPR128:$Rm), 14, 15)),
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(TRN1vvv_16b VPR128:$Rn, VPR128:$Rm)>;
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class NI_Trn1_v8<ValueType Ty, RegisterOperand VPR, Instruction INST>
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: Pat<(Ty (NI_ei_i32 (Ty (NI_ei_i32 (Ty (NI_ei_i32 (Ty (NI_ei_i32
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(Ty VPR:$Rn),
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(Ty VPR:$Rm), 0, 1)),
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(Ty VPR:$Rm), 2, 3)),
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(Ty VPR:$Rm), 4, 5)),
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(Ty VPR:$Rm), 6, 7)),
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(INST VPR:$Rn, VPR:$Rm)>;
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def : NI_Trn1_v8<v8i8, VPR64, TRN1vvv_8b>;
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def : NI_Trn1_v8<v8i16, VPR128, TRN1vvv_8h>;
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class NI_Trn1_v4<ValueType Ty, RegisterOperand VPR, Instruction INST,
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PatFrag ei>
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: Pat<(Ty (ei (Ty (ei
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(Ty VPR:$Rn),
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(Ty VPR:$Rm), 0, 1)),
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(Ty VPR:$Rm), 2, 3)),
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(INST VPR:$Rn, VPR:$Rm)>;
|
||||
|
||||
def : NI_Trn1_v4<v4i16, VPR64, TRN1vvv_4h, NI_ei_i32>;
|
||||
def : NI_Trn1_v4<v4i32, VPR128, TRN1vvv_4s, NI_ei_i32>;
|
||||
def : NI_Trn1_v4<v4f32, VPR128, TRN1vvv_4s, NI_ei_f32>;
|
||||
|
||||
// trn2
|
||||
def : Pat<(v16i8 (NI_ei_i32 (v16i8 (NI_ei_i32 (v16i8 (NI_ei_i32
|
||||
(v16i8 (NI_ei_i32 (v16i8 (NI_ei_i32 (v16i8 (NI_ei_i32
|
||||
(v16i8 (NI_ei_i32 (v16i8 (NI_ei_i32
|
||||
(v16i8 VPR128:$Rm),
|
||||
(v16i8 VPR128:$Rn), 1, 0)),
|
||||
(v16i8 VPR128:$Rn), 3, 2)),
|
||||
(v16i8 VPR128:$Rn), 5, 4)),
|
||||
(v16i8 VPR128:$Rn), 7, 6)),
|
||||
(v16i8 VPR128:$Rn), 9, 8)),
|
||||
(v16i8 VPR128:$Rn), 11, 10)),
|
||||
(v16i8 VPR128:$Rn), 13, 12)),
|
||||
(v16i8 VPR128:$Rn), 15, 14)),
|
||||
(TRN2vvv_16b VPR128:$Rn, VPR128:$Rm)>;
|
||||
|
||||
class NI_Trn2_v8<ValueType Ty, RegisterOperand VPR, Instruction INST>
|
||||
: Pat<(Ty (NI_ei_i32 (Ty (NI_ei_i32 (Ty (NI_ei_i32 (Ty (NI_ei_i32
|
||||
(Ty VPR:$Rm),
|
||||
(Ty VPR:$Rn), 1, 0)),
|
||||
(Ty VPR:$Rn), 3, 2)),
|
||||
(Ty VPR:$Rn), 5, 4)),
|
||||
(Ty VPR:$Rn), 7, 6)),
|
||||
(INST VPR:$Rn, VPR:$Rm)>;
|
||||
|
||||
def : NI_Trn2_v8<v8i8, VPR64, TRN2vvv_8b>;
|
||||
def : NI_Trn2_v8<v8i16, VPR128, TRN2vvv_8h>;
|
||||
|
||||
class NI_Trn2_v4<ValueType Ty, RegisterOperand VPR, Instruction INST,
|
||||
PatFrag ei>
|
||||
: Pat<(Ty (ei (Ty (ei
|
||||
(Ty VPR:$Rm),
|
||||
(Ty VPR:$Rn), 1, 0)),
|
||||
(Ty VPR:$Rn), 3, 2)),
|
||||
(INST VPR:$Rn, VPR:$Rm)>;
|
||||
|
||||
def : NI_Trn2_v4<v4i16, VPR64, TRN2vvv_4h, NI_ei_i32>;
|
||||
def : NI_Trn2_v4<v4i32, VPR128, TRN2vvv_4s, NI_ei_i32>;
|
||||
def : NI_Trn2_v4<v4f32, VPR128, TRN2vvv_4s, NI_ei_f32>;
|
||||
|
||||
// End of implementation for instruction class (Perm)
|
||||
|
||||
// The followings are for instruction class (3V Diff)
|
||||
|
||||
// normal long/long2 pattern
|
||||
|
||||
1676
test/CodeGen/AArch64/neon-perm.ll
Normal file
1676
test/CodeGen/AArch64/neon-perm.ll
Normal file
File diff suppressed because it is too large
Load Diff
@ -5235,3 +5235,419 @@
|
||||
// CHECK-ERROR: ext v0.2d, v1.2d, v2.2d, #0x0
|
||||
// CHECK-ERROR: ^
|
||||
|
||||
|
||||
//----------------------------------------------------------------------
|
||||
// Permutation with 3 vectors
|
||||
//----------------------------------------------------------------------
|
||||
|
||||
uzp1 v0.16b, v1.8b, v2.8b
|
||||
uzp1 v0.8b, v1.4b, v2.4b
|
||||
uzp1 v0.8h, v1.4h, v2.4h
|
||||
uzp1 v0.4h, v1.2h, v2.2h
|
||||
uzp1 v0.4s, v1.2s, v2.2s
|
||||
uzp1 v0.2s, v1.1s, v2.1s
|
||||
uzp1 v0.2d, v1.1d, v2.1d
|
||||
uzp1 v0.1d, v1.1d, v2.1d
|
||||
|
||||
// CHECK-ERROR <stdin>:4289:22: error: invalid operand for instruction
|
||||
// CHECK-ERROR uzp1 v0.16b, v1.8b, v2.8b
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4290:21: error: invalid operand for instruction
|
||||
// CHECK-ERROR uzp1 v0.8b, v1.4b, v2.4b
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4291:21: error: invalid operand for instruction
|
||||
// CHECK-ERROR uzp1 v0.8h, v1.4h, v2.4h
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4292:21: error: invalid operand for instruction
|
||||
// CHECK-ERROR uzp1 v0.4h, v1.2h, v2.2h
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4293:21: error: invalid operand for instruction
|
||||
// CHECK-ERROR uzp1 v0.4s, v1.2s, v2.2s
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4294:21: error: invalid operand for instruction
|
||||
// CHECK-ERROR uzp1 v0.2s, v1.1s, v2.1s
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4295:21: error: invalid operand for instruction
|
||||
// CHECK-ERROR uzp1 v0.2d, v1.1d, v2.1d
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4296:17: error: invalid operand for instruction
|
||||
// CHECK-ERROR uzp1 v0.1d, v1.1d, v2.1d
|
||||
// CHECK-ERROR ^
|
||||
|
||||
uzp2 v0.16b, v1.8b, v2.8b
|
||||
uzp2 v0.8b, v1.4b, v2.4b
|
||||
uzp2 v0.8h, v1.4h, v2.4h
|
||||
uzp2 v0.4h, v1.2h, v2.2h
|
||||
uzp2 v0.4s, v1.2s, v2.2s
|
||||
uzp2 v0.2s, v1.1s, v2.1s
|
||||
uzp2 v0.2d, v1.1d, v2.1d
|
||||
uzp2 v0.1d, v1.1d, v2.1d
|
||||
|
||||
// CHECK-ERROR <stdin>:4298:22: error: invalid operand for instruction
|
||||
// CHECK-ERROR uzp2 v0.16b, v1.8b, v2.8b
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4299:21: error: invalid operand for instruction
|
||||
// CHECK-ERROR uzp2 v0.8b, v1.4b, v2.4b
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4300:21: error: invalid operand for instruction
|
||||
// CHECK-ERROR uzp2 v0.8h, v1.4h, v2.4h
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4301:21: error: invalid operand for instruction
|
||||
// CHECK-ERROR uzp2 v0.4h, v1.2h, v2.2h
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4302:21: error: invalid operand for instruction
|
||||
// CHECK-ERROR uzp2 v0.4s, v1.2s, v2.2s
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4303:21: error: invalid operand for instruction
|
||||
// CHECK-ERROR uzp2 v0.2s, v1.1s, v2.1s
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4304:21: error: invalid operand for instruction
|
||||
// CHECK-ERROR uzp2 v0.2d, v1.1d, v2.1d
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4305:17: error: invalid operand for instruction
|
||||
// CHECK-ERROR uzp2 v0.1d, v1.1d, v2.1d
|
||||
// CHECK-ERROR ^
|
||||
|
||||
zip1 v0.16b, v1.8b, v2.8b
|
||||
zip1 v0.8b, v1.4b, v2.4b
|
||||
zip1 v0.8h, v1.4h, v2.4h
|
||||
zip1 v0.4h, v1.2h, v2.2h
|
||||
zip1 v0.4s, v1.2s, v2.2s
|
||||
zip1 v0.2s, v1.1s, v2.1s
|
||||
zip1 v0.2d, v1.1d, v2.1d
|
||||
zip1 v0.1d, v1.1d, v2.1d
|
||||
|
||||
// CHECK-ERROR <stdin>:4307:22: error: invalid operand for instruction
|
||||
// CHECK-ERROR zip1 v0.16b, v1.8b, v2.8b
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4308:21: error: invalid operand for instruction
|
||||
// CHECK-ERROR zip1 v0.8b, v1.4b, v2.4b
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4309:21: error: invalid operand for instruction
|
||||
// CHECK-ERROR zip1 v0.8h, v1.4h, v2.4h
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4310:21: error: invalid operand for instruction
|
||||
// CHECK-ERROR zip1 v0.4h, v1.2h, v2.2h
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4311:21: error: invalid operand for instruction
|
||||
// CHECK-ERROR zip1 v0.4s, v1.2s, v2.2s
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4312:21: error: invalid operand for instruction
|
||||
// CHECK-ERROR zip1 v0.2s, v1.1s, v2.1s
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4313:21: error: invalid operand for instruction
|
||||
// CHECK-ERROR zip1 v0.2d, v1.1d, v2.1d
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4314:17: error: invalid operand for instruction
|
||||
// CHECK-ERROR zip1 v0.1d, v1.1d, v2.1d
|
||||
// CHECK-ERROR ^
|
||||
|
||||
zip2 v0.16b, v1.8b, v2.8b
|
||||
zip2 v0.8b, v1.4b, v2.4b
|
||||
zip2 v0.8h, v1.4h, v2.4h
|
||||
zip2 v0.4h, v1.2h, v2.2h
|
||||
zip2 v0.4s, v1.2s, v2.2s
|
||||
zip2 v0.2s, v1.1s, v2.1s
|
||||
zip2 v0.2d, v1.1d, v2.1d
|
||||
zip2 v0.1d, v1.1d, v2.1d
|
||||
|
||||
// CHECK-ERROR <stdin>:4316:22: error: invalid operand for instruction
|
||||
// CHECK-ERROR zip2 v0.16b, v1.8b, v2.8b
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4317:21: error: invalid operand for instruction
|
||||
// CHECK-ERROR zip2 v0.8b, v1.4b, v2.4b
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4318:21: error: invalid operand for instruction
|
||||
// CHECK-ERROR zip2 v0.8h, v1.4h, v2.4h
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4319:21: error: invalid operand for instruction
|
||||
// CHECK-ERROR zip2 v0.4h, v1.2h, v2.2h
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4320:21: error: invalid operand for instruction
|
||||
// CHECK-ERROR zip2 v0.4s, v1.2s, v2.2s
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4321:21: error: invalid operand for instruction
|
||||
// CHECK-ERROR zip2 v0.2s, v1.1s, v2.1s
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4322:21: error: invalid operand for instruction
|
||||
// CHECK-ERROR zip2 v0.2d, v1.1d, v2.1d
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4323:17: error: invalid operand for instruction
|
||||
// CHECK-ERROR zip2 v0.1d, v1.1d, v2.1d
|
||||
// CHECK-ERROR ^
|
||||
|
||||
trn1 v0.16b, v1.8b, v2.8b
|
||||
trn1 v0.8b, v1.4b, v2.4b
|
||||
trn1 v0.8h, v1.4h, v2.4h
|
||||
trn1 v0.4h, v1.2h, v2.2h
|
||||
trn1 v0.4s, v1.2s, v2.2s
|
||||
trn1 v0.2s, v1.1s, v2.1s
|
||||
trn1 v0.2d, v1.1d, v2.1d
|
||||
trn1 v0.1d, v1.1d, v2.1d
|
||||
|
||||
// CHECK-ERROR <stdin>:4325:22: error: invalid operand for instruction
|
||||
// CHECK-ERROR trn1 v0.16b, v1.8b, v2.8b
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4326:21: error: invalid operand for instruction
|
||||
// CHECK-ERROR trn1 v0.8b, v1.4b, v2.4b
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4327:21: error: invalid operand for instruction
|
||||
// CHECK-ERROR trn1 v0.8h, v1.4h, v2.4h
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4328:21: error: invalid operand for instruction
|
||||
// CHECK-ERROR trn1 v0.4h, v1.2h, v2.2h
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4329:21: error: invalid operand for instruction
|
||||
// CHECK-ERROR trn1 v0.4s, v1.2s, v2.2s
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4330:21: error: invalid operand for instruction
|
||||
// CHECK-ERROR trn1 v0.2s, v1.1s, v2.1s
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4331:21: error: invalid operand for instruction
|
||||
// CHECK-ERROR trn1 v0.2d, v1.1d, v2.1d
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4332:17: error: invalid operand for instruction
|
||||
// CHECK-ERROR trn1 v0.1d, v1.1d, v2.1d
|
||||
// CHECK-ERROR ^
|
||||
|
||||
trn2 v0.16b, v1.8b, v2.8b
|
||||
trn2 v0.8b, v1.4b, v2.4b
|
||||
trn2 v0.8h, v1.4h, v2.4h
|
||||
trn2 v0.4h, v1.2h, v2.2h
|
||||
trn2 v0.4s, v1.2s, v2.2s
|
||||
trn2 v0.2s, v1.1s, v2.1s
|
||||
trn2 v0.2d, v1.1d, v2.1d
|
||||
trn2 v0.1d, v1.1d, v2.1d
|
||||
|
||||
// CHECK-ERROR <stdin>:4334:22: error: invalid operand for instruction
|
||||
// CHECK-ERROR trn2 v0.16b, v1.8b, v2.8b
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4335:21: error: invalid operand for instruction
|
||||
// CHECK-ERROR trn2 v0.8b, v1.4b, v2.4b
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4336:21: error: invalid operand for instruction
|
||||
// CHECK-ERROR trn2 v0.8h, v1.4h, v2.4h
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4337:21: error: invalid operand for instruction
|
||||
// CHECK-ERROR trn2 v0.4h, v1.2h, v2.2h
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4338:21: error: invalid operand for instruction
|
||||
// CHECK-ERROR trn2 v0.4s, v1.2s, v2.2s
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4339:21: error: invalid operand for instruction
|
||||
// CHECK-ERROR trn2 v0.2s, v1.1s, v2.1s
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4340:21: error: invalid operand for instruction
|
||||
// CHECK-ERROR trn2 v0.2d, v1.1d, v2.1d
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4341:17: error: invalid operand for instruction
|
||||
// CHECK-ERROR trn2 v0.1d, v1.1d, v2.1d
|
||||
// CHECK-ERROR ^
|
||||
|
||||
//----------------------------------------------------------------------
|
||||
// Permutation with 3 vectors
|
||||
//----------------------------------------------------------------------
|
||||
|
||||
uzp1 v0.16b, v1.8b, v2.8b
|
||||
uzp1 v0.8b, v1.4b, v2.4b
|
||||
uzp1 v0.8h, v1.4h, v2.4h
|
||||
uzp1 v0.4h, v1.2h, v2.2h
|
||||
uzp1 v0.4s, v1.2s, v2.2s
|
||||
uzp1 v0.2s, v1.1s, v2.1s
|
||||
uzp1 v0.2d, v1.1d, v2.1d
|
||||
uzp1 v0.1d, v1.1d, v2.1d
|
||||
|
||||
// CHECK-ERROR <stdin>:4289:22: error: invalid operand for instruction
|
||||
// CHECK-ERROR uzp1 v0.16b, v1.8b, v2.8b
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4290:21: error: invalid operand for instruction
|
||||
// CHECK-ERROR uzp1 v0.8b, v1.4b, v2.4b
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4291:21: error: invalid operand for instruction
|
||||
// CHECK-ERROR uzp1 v0.8h, v1.4h, v2.4h
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4292:21: error: invalid operand for instruction
|
||||
// CHECK-ERROR uzp1 v0.4h, v1.2h, v2.2h
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4293:21: error: invalid operand for instruction
|
||||
// CHECK-ERROR uzp1 v0.4s, v1.2s, v2.2s
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4294:21: error: invalid operand for instruction
|
||||
// CHECK-ERROR uzp1 v0.2s, v1.1s, v2.1s
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4295:21: error: invalid operand for instruction
|
||||
// CHECK-ERROR uzp1 v0.2d, v1.1d, v2.1d
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4296:17: error: invalid operand for instruction
|
||||
// CHECK-ERROR uzp1 v0.1d, v1.1d, v2.1d
|
||||
// CHECK-ERROR ^
|
||||
|
||||
uzp2 v0.16b, v1.8b, v2.8b
|
||||
uzp2 v0.8b, v1.4b, v2.4b
|
||||
uzp2 v0.8h, v1.4h, v2.4h
|
||||
uzp2 v0.4h, v1.2h, v2.2h
|
||||
uzp2 v0.4s, v1.2s, v2.2s
|
||||
uzp2 v0.2s, v1.1s, v2.1s
|
||||
uzp2 v0.2d, v1.1d, v2.1d
|
||||
uzp2 v0.1d, v1.1d, v2.1d
|
||||
|
||||
// CHECK-ERROR <stdin>:4298:22: error: invalid operand for instruction
|
||||
// CHECK-ERROR uzp2 v0.16b, v1.8b, v2.8b
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4299:21: error: invalid operand for instruction
|
||||
// CHECK-ERROR uzp2 v0.8b, v1.4b, v2.4b
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4300:21: error: invalid operand for instruction
|
||||
// CHECK-ERROR uzp2 v0.8h, v1.4h, v2.4h
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4301:21: error: invalid operand for instruction
|
||||
// CHECK-ERROR uzp2 v0.4h, v1.2h, v2.2h
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4302:21: error: invalid operand for instruction
|
||||
// CHECK-ERROR uzp2 v0.4s, v1.2s, v2.2s
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4303:21: error: invalid operand for instruction
|
||||
// CHECK-ERROR uzp2 v0.2s, v1.1s, v2.1s
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4304:21: error: invalid operand for instruction
|
||||
// CHECK-ERROR uzp2 v0.2d, v1.1d, v2.1d
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4305:17: error: invalid operand for instruction
|
||||
// CHECK-ERROR uzp2 v0.1d, v1.1d, v2.1d
|
||||
// CHECK-ERROR ^
|
||||
|
||||
zip1 v0.16b, v1.8b, v2.8b
|
||||
zip1 v0.8b, v1.4b, v2.4b
|
||||
zip1 v0.8h, v1.4h, v2.4h
|
||||
zip1 v0.4h, v1.2h, v2.2h
|
||||
zip1 v0.4s, v1.2s, v2.2s
|
||||
zip1 v0.2s, v1.1s, v2.1s
|
||||
zip1 v0.2d, v1.1d, v2.1d
|
||||
zip1 v0.1d, v1.1d, v2.1d
|
||||
|
||||
// CHECK-ERROR <stdin>:4307:22: error: invalid operand for instruction
|
||||
// CHECK-ERROR zip1 v0.16b, v1.8b, v2.8b
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4308:21: error: invalid operand for instruction
|
||||
// CHECK-ERROR zip1 v0.8b, v1.4b, v2.4b
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4309:21: error: invalid operand for instruction
|
||||
// CHECK-ERROR zip1 v0.8h, v1.4h, v2.4h
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4310:21: error: invalid operand for instruction
|
||||
// CHECK-ERROR zip1 v0.4h, v1.2h, v2.2h
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4311:21: error: invalid operand for instruction
|
||||
// CHECK-ERROR zip1 v0.4s, v1.2s, v2.2s
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4312:21: error: invalid operand for instruction
|
||||
// CHECK-ERROR zip1 v0.2s, v1.1s, v2.1s
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4313:21: error: invalid operand for instruction
|
||||
// CHECK-ERROR zip1 v0.2d, v1.1d, v2.1d
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4314:17: error: invalid operand for instruction
|
||||
// CHECK-ERROR zip1 v0.1d, v1.1d, v2.1d
|
||||
// CHECK-ERROR ^
|
||||
|
||||
zip2 v0.16b, v1.8b, v2.8b
|
||||
zip2 v0.8b, v1.4b, v2.4b
|
||||
zip2 v0.8h, v1.4h, v2.4h
|
||||
zip2 v0.4h, v1.2h, v2.2h
|
||||
zip2 v0.4s, v1.2s, v2.2s
|
||||
zip2 v0.2s, v1.1s, v2.1s
|
||||
zip2 v0.2d, v1.1d, v2.1d
|
||||
zip2 v0.1d, v1.1d, v2.1d
|
||||
|
||||
// CHECK-ERROR <stdin>:4316:22: error: invalid operand for instruction
|
||||
// CHECK-ERROR zip2 v0.16b, v1.8b, v2.8b
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4317:21: error: invalid operand for instruction
|
||||
// CHECK-ERROR zip2 v0.8b, v1.4b, v2.4b
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4318:21: error: invalid operand for instruction
|
||||
// CHECK-ERROR zip2 v0.8h, v1.4h, v2.4h
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4319:21: error: invalid operand for instruction
|
||||
// CHECK-ERROR zip2 v0.4h, v1.2h, v2.2h
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4320:21: error: invalid operand for instruction
|
||||
// CHECK-ERROR zip2 v0.4s, v1.2s, v2.2s
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4321:21: error: invalid operand for instruction
|
||||
// CHECK-ERROR zip2 v0.2s, v1.1s, v2.1s
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4322:21: error: invalid operand for instruction
|
||||
// CHECK-ERROR zip2 v0.2d, v1.1d, v2.1d
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4323:17: error: invalid operand for instruction
|
||||
// CHECK-ERROR zip2 v0.1d, v1.1d, v2.1d
|
||||
// CHECK-ERROR ^
|
||||
|
||||
trn1 v0.16b, v1.8b, v2.8b
|
||||
trn1 v0.8b, v1.4b, v2.4b
|
||||
trn1 v0.8h, v1.4h, v2.4h
|
||||
trn1 v0.4h, v1.2h, v2.2h
|
||||
trn1 v0.4s, v1.2s, v2.2s
|
||||
trn1 v0.2s, v1.1s, v2.1s
|
||||
trn1 v0.2d, v1.1d, v2.1d
|
||||
trn1 v0.1d, v1.1d, v2.1d
|
||||
|
||||
// CHECK-ERROR <stdin>:4325:22: error: invalid operand for instruction
|
||||
// CHECK-ERROR trn1 v0.16b, v1.8b, v2.8b
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4326:21: error: invalid operand for instruction
|
||||
// CHECK-ERROR trn1 v0.8b, v1.4b, v2.4b
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4327:21: error: invalid operand for instruction
|
||||
// CHECK-ERROR trn1 v0.8h, v1.4h, v2.4h
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4328:21: error: invalid operand for instruction
|
||||
// CHECK-ERROR trn1 v0.4h, v1.2h, v2.2h
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4329:21: error: invalid operand for instruction
|
||||
// CHECK-ERROR trn1 v0.4s, v1.2s, v2.2s
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4330:21: error: invalid operand for instruction
|
||||
// CHECK-ERROR trn1 v0.2s, v1.1s, v2.1s
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4331:21: error: invalid operand for instruction
|
||||
// CHECK-ERROR trn1 v0.2d, v1.1d, v2.1d
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4332:17: error: invalid operand for instruction
|
||||
// CHECK-ERROR trn1 v0.1d, v1.1d, v2.1d
|
||||
// CHECK-ERROR ^
|
||||
|
||||
trn2 v0.16b, v1.8b, v2.8b
|
||||
trn2 v0.8b, v1.4b, v2.4b
|
||||
trn2 v0.8h, v1.4h, v2.4h
|
||||
trn2 v0.4h, v1.2h, v2.2h
|
||||
trn2 v0.4s, v1.2s, v2.2s
|
||||
trn2 v0.2s, v1.1s, v2.1s
|
||||
trn2 v0.2d, v1.1d, v2.1d
|
||||
trn2 v0.1d, v1.1d, v2.1d
|
||||
|
||||
// CHECK-ERROR <stdin>:4334:22: error: invalid operand for instruction
|
||||
// CHECK-ERROR trn2 v0.16b, v1.8b, v2.8b
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4335:21: error: invalid operand for instruction
|
||||
// CHECK-ERROR trn2 v0.8b, v1.4b, v2.4b
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4336:21: error: invalid operand for instruction
|
||||
// CHECK-ERROR trn2 v0.8h, v1.4h, v2.4h
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4337:21: error: invalid operand for instruction
|
||||
// CHECK-ERROR trn2 v0.4h, v1.2h, v2.2h
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4338:21: error: invalid operand for instruction
|
||||
// CHECK-ERROR trn2 v0.4s, v1.2s, v2.2s
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4339:21: error: invalid operand for instruction
|
||||
// CHECK-ERROR trn2 v0.2s, v1.1s, v2.1s
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4340:21: error: invalid operand for instruction
|
||||
// CHECK-ERROR trn2 v0.2d, v1.1d, v2.1d
|
||||
// CHECK-ERROR ^
|
||||
// CHECK-ERROR <stdin>:4341:17: error: invalid operand for instruction
|
||||
// CHECK-ERROR trn2 v0.1d, v1.1d, v2.1d
|
||||
// CHECK-ERROR ^
|
||||
|
||||
103
test/MC/AArch64/neon-perm.s
Normal file
103
test/MC/AArch64/neon-perm.s
Normal file
@ -0,0 +1,103 @@
|
||||
// RUN: llvm-mc -triple=aarch64 -mattr=+neon -show-encoding < %s | FileCheck %s
|
||||
|
||||
// Check that the assembler can handle the documented syntax for AArch64
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
// Instructions for permute
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
uzp1 v0.8b, v1.8b, v2.8b
|
||||
uzp1 v0.16b, v1.16b, v2.16b
|
||||
uzp1 v0.4h, v1.4h, v2.4h
|
||||
uzp1 v0.8h, v1.8h, v2.8h
|
||||
uzp1 v0.2s, v1.2s, v2.2s
|
||||
uzp1 v0.4s, v1.4s, v2.4s
|
||||
uzp1 v0.2d, v1.2d, v2.2d
|
||||
|
||||
// CHECK: uzp1 v0.8b, v1.8b, v2.8b // encoding: [0x20,0x18,0x02,0x0e]
|
||||
// CHECK: uzp1 v0.16b, v1.16b, v2.16b // encoding: [0x20,0x18,0x02,0x4e]
|
||||
// CHECK: uzp1 v0.4h, v1.4h, v2.4h // encoding: [0x20,0x18,0x42,0x0e]
|
||||
// CHECK: uzp1 v0.8h, v1.8h, v2.8h // encoding: [0x20,0x18,0x42,0x4e]
|
||||
// CHECK: uzp1 v0.2s, v1.2s, v2.2s // encoding: [0x20,0x18,0x82,0x0e]
|
||||
// CHECK: uzp1 v0.4s, v1.4s, v2.4s // encoding: [0x20,0x18,0x82,0x4e]
|
||||
// CHECK: uzp1 v0.2d, v1.2d, v2.2d // encoding: [0x20,0x18,0xc2,0x4e]
|
||||
|
||||
trn1 v0.8b, v1.8b, v2.8b
|
||||
trn1 v0.16b, v1.16b, v2.16b
|
||||
trn1 v0.4h, v1.4h, v2.4h
|
||||
trn1 v0.8h, v1.8h, v2.8h
|
||||
trn1 v0.2s, v1.2s, v2.2s
|
||||
trn1 v0.4s, v1.4s, v2.4s
|
||||
trn1 v0.2d, v1.2d, v2.2d
|
||||
|
||||
// CHECK: trn1 v0.8b, v1.8b, v2.8b // encoding: [0x20,0x28,0x02,0x0e]
|
||||
// CHECK: trn1 v0.16b, v1.16b, v2.16b // encoding: [0x20,0x28,0x02,0x4e]
|
||||
// CHECK: trn1 v0.4h, v1.4h, v2.4h // encoding: [0x20,0x28,0x42,0x0e]
|
||||
// CHECK: trn1 v0.8h, v1.8h, v2.8h // encoding: [0x20,0x28,0x42,0x4e]
|
||||
// CHECK: trn1 v0.2s, v1.2s, v2.2s // encoding: [0x20,0x28,0x82,0x0e]
|
||||
// CHECK: trn1 v0.4s, v1.4s, v2.4s // encoding: [0x20,0x28,0x82,0x4e]
|
||||
// CHECK: trn1 v0.2d, v1.2d, v2.2d // encoding: [0x20,0x28,0xc2,0x4e]
|
||||
|
||||
zip1 v0.8b, v1.8b, v2.8b
|
||||
zip1 v0.16b, v1.16b, v2.16b
|
||||
zip1 v0.4h, v1.4h, v2.4h
|
||||
zip1 v0.8h, v1.8h, v2.8h
|
||||
zip1 v0.2s, v1.2s, v2.2s
|
||||
zip1 v0.4s, v1.4s, v2.4s
|
||||
zip1 v0.2d, v1.2d, v2.2d
|
||||
|
||||
// CHECK: zip1 v0.8b, v1.8b, v2.8b // encoding: [0x20,0x38,0x02,0x0e]
|
||||
// CHECK: zip1 v0.16b, v1.16b, v2.16b // encoding: [0x20,0x38,0x02,0x4e]
|
||||
// CHECK: zip1 v0.4h, v1.4h, v2.4h // encoding: [0x20,0x38,0x42,0x0e]
|
||||
// CHECK: zip1 v0.8h, v1.8h, v2.8h // encoding: [0x20,0x38,0x42,0x4e]
|
||||
// CHECK: zip1 v0.2s, v1.2s, v2.2s // encoding: [0x20,0x38,0x82,0x0e]
|
||||
// CHECK: zip1 v0.4s, v1.4s, v2.4s // encoding: [0x20,0x38,0x82,0x4e]
|
||||
// CHECK: zip1 v0.2d, v1.2d, v2.2d // encoding: [0x20,0x38,0xc2,0x4e]
|
||||
|
||||
uzp2 v0.8b, v1.8b, v2.8b
|
||||
uzp2 v0.16b, v1.16b, v2.16b
|
||||
uzp2 v0.4h, v1.4h, v2.4h
|
||||
uzp2 v0.8h, v1.8h, v2.8h
|
||||
uzp2 v0.2s, v1.2s, v2.2s
|
||||
uzp2 v0.4s, v1.4s, v2.4s
|
||||
uzp2 v0.2d, v1.2d, v2.2d
|
||||
|
||||
// CHECK: uzp2 v0.8b, v1.8b, v2.8b // encoding: [0x20,0x58,0x02,0x0e]
|
||||
// CHECK: uzp2 v0.16b, v1.16b, v2.16b // encoding: [0x20,0x58,0x02,0x4e]
|
||||
// CHECK: uzp2 v0.4h, v1.4h, v2.4h // encoding: [0x20,0x58,0x42,0x0e]
|
||||
// CHECK: uzp2 v0.8h, v1.8h, v2.8h // encoding: [0x20,0x58,0x42,0x4e]
|
||||
// CHECK: uzp2 v0.2s, v1.2s, v2.2s // encoding: [0x20,0x58,0x82,0x0e]
|
||||
// CHECK: uzp2 v0.4s, v1.4s, v2.4s // encoding: [0x20,0x58,0x82,0x4e]
|
||||
// CHECK: uzp2 v0.2d, v1.2d, v2.2d // encoding: [0x20,0x58,0xc2,0x4e]
|
||||
|
||||
trn2 v0.8b, v1.8b, v2.8b
|
||||
trn2 v0.16b, v1.16b, v2.16b
|
||||
trn2 v0.4h, v1.4h, v2.4h
|
||||
trn2 v0.8h, v1.8h, v2.8h
|
||||
trn2 v0.2s, v1.2s, v2.2s
|
||||
trn2 v0.4s, v1.4s, v2.4s
|
||||
trn2 v0.2d, v1.2d, v2.2d
|
||||
|
||||
// CHECK: trn2 v0.8b, v1.8b, v2.8b // encoding: [0x20,0x68,0x02,0x0e]
|
||||
// CHECK: trn2 v0.16b, v1.16b, v2.16b // encoding: [0x20,0x68,0x02,0x4e]
|
||||
// CHECK: trn2 v0.4h, v1.4h, v2.4h // encoding: [0x20,0x68,0x42,0x0e]
|
||||
// CHECK: trn2 v0.8h, v1.8h, v2.8h // encoding: [0x20,0x68,0x42,0x4e]
|
||||
// CHECK: trn2 v0.2s, v1.2s, v2.2s // encoding: [0x20,0x68,0x82,0x0e]
|
||||
// CHECK: trn2 v0.4s, v1.4s, v2.4s // encoding: [0x20,0x68,0x82,0x4e]
|
||||
// CHECK: trn2 v0.2d, v1.2d, v2.2d // encoding: [0x20,0x68,0xc2,0x4e]
|
||||
|
||||
zip2 v0.8b, v1.8b, v2.8b
|
||||
zip2 v0.16b, v1.16b, v2.16b
|
||||
zip2 v0.4h, v1.4h, v2.4h
|
||||
zip2 v0.8h, v1.8h, v2.8h
|
||||
zip2 v0.2s, v1.2s, v2.2s
|
||||
zip2 v0.4s, v1.4s, v2.4s
|
||||
zip2 v0.2d, v1.2d, v2.2d
|
||||
|
||||
// CHECK: zip2 v0.8b, v1.8b, v2.8b // encoding: [0x20,0x78,0x02,0x0e]
|
||||
// CHECK: zip2 v0.16b, v1.16b, v2.16b // encoding: [0x20,0x78,0x02,0x4e]
|
||||
// CHECK: zip2 v0.4h, v1.4h, v2.4h // encoding: [0x20,0x78,0x42,0x0e]
|
||||
// CHECK: zip2 v0.8h, v1.8h, v2.8h // encoding: [0x20,0x78,0x42,0x4e]
|
||||
// CHECK: zip2 v0.2s, v1.2s, v2.2s // encoding: [0x20,0x78,0x82,0x0e]
|
||||
// CHECK: zip2 v0.4s, v1.4s, v2.4s // encoding: [0x20,0x78,0x82,0x4e]
|
||||
// CHECK: zip2 v0.2d, v1.2d, v2.2d // encoding: [0x20,0x78,0xc2,0x4e]
|
||||
@ -2051,3 +2051,110 @@ G# RUN: llvm-mc -triple aarch64-none-linux-gnu -mattr=+neon -disassemble < %s |
|
||||
# CHECK: ext v0.8b, v1.8b, v2.8b, #0x3
|
||||
# CHECK: ext v0.16b, v1.16b, v2.16b, #0x3
|
||||
|
||||
#----------------------------------------------------------------------
|
||||
# unzip with 3 same vectors to get primary result
|
||||
#----------------------------------------------------------------------
|
||||
# CHECK: uzp1 v1.8b, v1.8b, v2.8b
|
||||
# CHECK: uzp1 v2.16b, v1.16b, v2.16b
|
||||
# CHECK: uzp1 v3.4h, v1.4h, v2.4h
|
||||
# CHECK: uzp1 v4.8h, v1.8h, v2.8h
|
||||
# CHECK: uzp1 v5.2s, v1.2s, v2.2s
|
||||
# CHECK: uzp1 v6.4s, v1.4s, v2.4s
|
||||
# CHECK: uzp1 v7.2d, v1.2d, v2.2d
|
||||
0x21,0x18,0x02,0x0e
|
||||
0x22,0x18,0x02,0x4e
|
||||
0x23,0x18,0x42,0x0e
|
||||
0x24,0x18,0x42,0x4e
|
||||
0x25,0x18,0x82,0x0e
|
||||
0x26,0x18,0x82,0x4e
|
||||
0x27,0x18,0xc2,0x4e
|
||||
|
||||
#----------------------------------------------------------------------
|
||||
# transpose with 3 same vectors to get primary result
|
||||
#----------------------------------------------------------------------
|
||||
# CHECK: trn1 v8.8b, v1.8b, v2.8b
|
||||
# CHECK: trn1 v9.16b, v1.16b, v2.16b
|
||||
# CHECK: trn1 v10.4h, v1.4h, v2.4h
|
||||
# CHECK: trn1 v27.8h, v7.8h, v2.8h
|
||||
# CHECK: trn1 v12.2s, v7.2s, v2.2s
|
||||
# CHECK: trn1 v29.4s, v6.4s, v2.4s
|
||||
# CHECK: trn1 v14.2d, v6.2d, v2.2d
|
||||
0x28,0x28,0x02,0x0e
|
||||
0x29,0x28,0x02,0x4e
|
||||
0x2a,0x28,0x42,0x0e
|
||||
0xfb,0x28,0x42,0x4e
|
||||
0xec,0x28,0x82,0x0e
|
||||
0xdd,0x28,0x82,0x4e
|
||||
0xce,0x28,0xc2,0x4e
|
||||
|
||||
#----------------------------------------------------------------------
|
||||
# zip with 3 same vectors to get primary result
|
||||
#----------------------------------------------------------------------
|
||||
# CHECK: zip1 v31.8b, v5.8b, v2.8b
|
||||
# CHECK: zip1 v0.16b, v5.16b, v2.16b
|
||||
# CHECK: zip1 v17.4h, v4.4h, v2.4h
|
||||
# CHECK: zip1 v2.8h, v4.8h, v2.8h
|
||||
# CHECK: zip1 v19.2s, v3.2s, v2.2s
|
||||
# CHECK: zip1 v4.4s, v3.4s, v2.4s
|
||||
# CHECK: zip1 v21.2d, v2.2d, v2.2d
|
||||
0xbf,0x38,0x02,0x0e
|
||||
0xa0,0x38,0x02,0x4e
|
||||
0x91,0x38,0x42,0x0e
|
||||
0x82,0x38,0x42,0x4e
|
||||
0x73,0x38,0x82,0x0e
|
||||
0x64,0x38,0x82,0x4e
|
||||
0x55,0x38,0xc2,0x4e
|
||||
|
||||
#----------------------------------------------------------------------
|
||||
# unzip with 3 same vectors to get secondary result
|
||||
#----------------------------------------------------------------------
|
||||
# CHECK: uzp2 v6.8b, v2.8b, v2.8b
|
||||
# CHECK: uzp2 v23.16b, v1.16b, v2.16b
|
||||
# CHECK: uzp2 v8.4h, v1.4h, v2.4h
|
||||
# CHECK: uzp2 v25.8h, v0.8h, v2.8h
|
||||
# CHECK: uzp2 v10.2s, v0.2s, v2.2s
|
||||
# CHECK: uzp2 v27.4s, v7.4s, v2.4s
|
||||
# CHECK: uzp2 v12.2d, v7.2d, v2.2d
|
||||
0x46,0x58,0x02,0x0e
|
||||
0x37,0x58,0x02,0x4e
|
||||
0x28,0x58,0x42,0x0e
|
||||
0x19,0x58,0x42,0x4e
|
||||
0x0a,0x58,0x82,0x0e
|
||||
0xfb,0x58,0x82,0x4e
|
||||
0xec,0x58,0xc2,0x4e
|
||||
|
||||
#----------------------------------------------------------------------
|
||||
# transpose with 3 same vectors to get secondary result
|
||||
#----------------------------------------------------------------------
|
||||
# CHECK: trn2 v29.8b, v6.8b, v2.8b
|
||||
# CHECK: trn2 v14.16b, v6.16b, v2.16b
|
||||
# CHECK: trn2 v31.4h, v5.4h, v2.4h
|
||||
# CHECK: trn2 v0.8h, v5.8h, v2.8h
|
||||
# CHECK: trn2 v17.2s, v4.2s, v2.2s
|
||||
# CHECK: trn2 v2.4s, v4.4s, v2.4s
|
||||
# CHECK: trn2 v19.2d, v3.2d, v2.2d
|
||||
0xdd,0x68,0x02,0x0e
|
||||
0xce,0x68,0x02,0x4e
|
||||
0xbf,0x68,0x42,0x0e
|
||||
0xa0,0x68,0x42,0x4e
|
||||
0x91,0x68,0x82,0x0e
|
||||
0x82,0x68,0x82,0x4e
|
||||
0x73,0x68,0xc2,0x4e
|
||||
|
||||
#----------------------------------------------------------------------
|
||||
# zip with 3 same vectors to get secondary result
|
||||
#----------------------------------------------------------------------
|
||||
# CHECK: zip2 v4.8b, v3.8b, v2.8b
|
||||
# CHECK: zip2 v21.16b, v2.16b, v2.16b
|
||||
# CHECK: zip2 v6.4h, v2.4h, v2.4h
|
||||
# CHECK: zip2 v23.8h, v1.8h, v2.8h
|
||||
# CHECK: zip2 v8.2s, v1.2s, v2.2s
|
||||
# CHECK: zip2 v25.4s, v0.4s, v2.4s
|
||||
# CHECK: zip2 v10.2d, v0.2d, v2.2d
|
||||
0x64,0x78,0x02,0x0e
|
||||
0x55,0x78,0x02,0x4e
|
||||
0x46,0x78,0x42,0x0e
|
||||
0x37,0x78,0x42,0x4e
|
||||
0x28,0x78,0x82,0x0e
|
||||
0x19,0x78,0x82,0x4e
|
||||
0x0a,0x78,0xc2,0x4e
|
||||
|
||||
Loading…
Reference in New Issue
Block a user