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[CodeGen] Use range-based for loops (NFC)
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@ -65,9 +65,8 @@ void CriticalAntiDepBreaker::StartBlock(MachineBasicBlock *BB) {
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bool IsReturnBlock = BB->isReturnBlock();
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// Examine the live-in regs of all successors.
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for (MachineBasicBlock::succ_iterator SI = BB->succ_begin(),
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SE = BB->succ_end(); SI != SE; ++SI)
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for (const auto &LI : (*SI)->liveins()) {
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for (const MachineBasicBlock *Succ : BB->successors())
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for (const auto &LI : Succ->liveins()) {
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for (MCRegAliasIterator AI(LI.PhysReg, TRI, true); AI.isValid(); ++AI) {
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unsigned Reg = *AI;
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Classes[Reg] = reinterpret_cast<TargetRegisterClass *>(-1);
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@ -143,17 +142,16 @@ static const SDep *CriticalPathStep(const SUnit *SU) {
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const SDep *Next = nullptr;
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unsigned NextDepth = 0;
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// Find the predecessor edge with the greatest depth.
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for (SUnit::const_pred_iterator P = SU->Preds.begin(), PE = SU->Preds.end();
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P != PE; ++P) {
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const SUnit *PredSU = P->getSUnit();
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unsigned PredLatency = P->getLatency();
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for (const SDep &P : SU->Preds) {
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const SUnit *PredSU = P.getSUnit();
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unsigned PredLatency = P.getLatency();
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unsigned PredTotalLatency = PredSU->getDepth() + PredLatency;
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// In the case of a latency tie, prefer an anti-dependency edge over
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// other types of edges.
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if (NextDepth < PredTotalLatency ||
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(NextDepth == PredTotalLatency && P->getKind() == SDep::Anti)) {
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(NextDepth == PredTotalLatency && P.getKind() == SDep::Anti)) {
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NextDepth = PredTotalLatency;
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Next = &*P;
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Next = &P;
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}
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}
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return Next;
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@ -426,9 +424,8 @@ findSuitableFreeRegister(RegRefIter RegRefBegin,
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continue;
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// If NewReg overlaps any of the forbidden registers, we can't use it.
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bool Forbidden = false;
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for (SmallVectorImpl<unsigned>::iterator it = Forbid.begin(),
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ite = Forbid.end(); it != ite; ++it)
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if (TRI->regsOverlap(NewReg, *it)) {
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for (unsigned R : Forbid)
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if (TRI->regsOverlap(NewReg, R)) {
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Forbidden = true;
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break;
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}
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@ -582,11 +579,11 @@ BreakAntiDependencies(const std::vector<SUnit> &SUnits,
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// Also, if there are dependencies on other SUnits with the
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// same register as the anti-dependency, don't attempt to
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// break it.
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for (SUnit::const_pred_iterator P = CriticalPathSU->Preds.begin(),
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PE = CriticalPathSU->Preds.end(); P != PE; ++P)
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if (P->getSUnit() == NextSU ?
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(P->getKind() != SDep::Anti || P->getReg() != AntiDepReg) :
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(P->getKind() == SDep::Data && P->getReg() == AntiDepReg)) {
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for (const SDep &P : CriticalPathSU->Preds)
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if (P.getSUnit() == NextSU
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? (P.getKind() != SDep::Anti || P.getReg() != AntiDepReg)
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: (P.getKind() == SDep::Data &&
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P.getReg() == AntiDepReg)) {
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AntiDepReg = 0;
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break;
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}
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@ -132,10 +132,8 @@ bool DeadMachineInstructionElim::eliminateDeadMI(MachineFunction &MF) {
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// Add live-ins from successors to LivePhysRegs. Normally, physregs are not
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// live across blocks, but some targets (x86) can have flags live out of a
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// block.
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for (MachineBasicBlock::succ_iterator S = MBB->succ_begin(),
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E = MBB->succ_end();
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S != E; S++)
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for (const auto &LI : (*S)->liveins())
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for (const MachineBasicBlock *Succ : MBB->successors())
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for (const auto &LI : Succ->liveins())
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LivePhysRegs.set(LI.PhysReg);
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// Now scan the instructions and delete dead ones, tracking physreg
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@ -46,9 +46,8 @@ bool EdgeBundles::runOnMachineFunction(MachineFunction &mf) {
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for (const auto &MBB : *MF) {
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unsigned OutE = 2 * MBB.getNumber() + 1;
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// Join the outgoing bundle with the ingoing bundles of all successors.
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for (MachineBasicBlock::const_succ_iterator SI = MBB.succ_begin(),
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SE = MBB.succ_end(); SI != SE; ++SI)
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EC.join(OutE, 2 * (*SI)->getNumber());
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for (const MachineBasicBlock *Succ : MBB.successors())
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EC.join(OutE, 2 * Succ->getNumber());
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}
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EC.compress();
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if (ViewEdgeBundles)
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@ -86,10 +85,9 @@ raw_ostream &WriteGraph<>(raw_ostream &O, const EdgeBundles &G,
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<< "\"\n"
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<< "\t\"" << printMBBReference(MBB) << "\" -> " << G.getBundle(BB, true)
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<< '\n';
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for (MachineBasicBlock::const_succ_iterator SI = MBB.succ_begin(),
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SE = MBB.succ_end(); SI != SE; ++SI)
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for (const MachineBasicBlock *Succ : MBB.successors())
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O << "\t\"" << printMBBReference(MBB) << "\" -> \""
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<< printMBBReference(**SI) << "\" [ color=lightgray ]\n";
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<< printMBBReference(*Succ) << "\" [ color=lightgray ]\n";
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}
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O << "}\n";
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return O;
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@ -188,9 +188,8 @@ bool ExpandPostRA::runOnMachineFunction(MachineFunction &MF) {
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bool MadeChange = false;
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for (MachineFunction::iterator mbbi = MF.begin(), mbbe = MF.end();
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mbbi != mbbe; ++mbbi) {
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for (MachineBasicBlock::iterator mi = mbbi->begin(), me = mbbi->end();
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for (MachineBasicBlock &MBB : MF) {
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for (MachineBasicBlock::iterator mi = MBB.begin(), me = MBB.end();
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mi != me;) {
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MachineInstr &MI = *mi;
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// Advance iterator here because MI may be erased.
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@ -105,9 +105,9 @@ void LowerIntrinsics::getAnalysisUsage(AnalysisUsage &AU) const {
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bool LowerIntrinsics::doInitialization(Module &M) {
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GCModuleInfo *MI = getAnalysisIfAvailable<GCModuleInfo>();
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assert(MI && "LowerIntrinsics didn't require GCModuleInfo!?");
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for (Module::iterator I = M.begin(), E = M.end(); I != E; ++I)
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if (!I->isDeclaration() && I->hasGC())
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MI->getFunctionInfo(*I); // Instantiate the GC strategy.
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for (Function &F : M)
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if (!F.isDeclaration() && F.hasGC())
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MI->getFunctionInfo(F); // Instantiate the GC strategy.
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return false;
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}
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@ -278,8 +278,7 @@ Error GISelCSEInfo::verify() {
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// For every node in the CSEMap, make sure that the InstrMapping
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// points to it.
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for (auto It = CSEMap.begin(), End = CSEMap.end(); It != End; ++It) {
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const UniqueMachineInstr &UMI = *It;
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for (const UniqueMachineInstr &UMI : CSEMap) {
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if (!InstrMapping.count(UMI.MI))
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return createStringError(std::errc::not_supported,
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"Node in CSE without InstrMapping", UMI.MI);
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@ -232,11 +232,9 @@ bool HardwareLoops::runOnFunction(Function &F) {
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AC = &getAnalysis<AssumptionCacheTracker>().getAssumptionCache(F);
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M = F.getParent();
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for (LoopInfo::iterator I = LI->begin(), E = LI->end(); I != E; ++I) {
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Loop *L = *I;
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for (Loop *L : *LI)
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if (L->isOutermost())
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TryConvertLoop(L);
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}
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return MadeChange;
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}
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