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* The itf exposed by InstrScheduling is now a single function to create the right pass

* InstructionScheduling is now a real pass
* InstrSched _uses_ LiveVar analysis, instead of creating it's own copy many times
  through a loop.  In this was LiveVarAnalysis is actually even SHARED by Register
  allocation.
* SchedPriorities is now passed the live var information in

llvm-svn: 1700
This commit is contained in:
Chris Lattner 2002-02-04 20:02:16 +00:00
parent b4e0d0424c
commit 9cd29563f0
3 changed files with 63 additions and 51 deletions

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@ -14,6 +14,7 @@
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineCodeForInstruction.h"
#include "llvm/CodeGen/MachineCodeForMethod.h"
#include "llvm/Analysis/LiveVar/MethodLiveVarInfo.h" // FIXME: Remove when AnalysisUsage sets can be symbolic!
#include "llvm/Target/TargetMachine.h"
#include "llvm/BasicBlock.h"
#include "SchedPriorities.h"
@ -1491,46 +1492,60 @@ instrIsFeasible(const SchedulingManager& S,
// are still in SSA form.
//---------------------------------------------------------------------------
bool
ScheduleInstructionsWithSSA(Method* method,
const TargetMachine &target)
{
SchedGraphSet graphSet(method, target);
if (SchedDebugLevel >= Sched_PrintSchedGraphs)
{
cerr << "\n*** SCHEDULING GRAPHS FOR INSTRUCTION SCHEDULING\n";
graphSet.dump();
namespace {
class InstructionSchedulingWithSSA : public MethodPass {
const TargetMachine &Target;
public:
inline InstructionSchedulingWithSSA(const TargetMachine &T) : Target(T) {}
// getAnalysisUsageInfo - We use LiveVarInfo...
virtual void getAnalysisUsageInfo(Pass::AnalysisSet &Requires,
Pass::AnalysisSet &Destroyed,
Pass::AnalysisSet &Provided) {
Requires.push_back(MethodLiveVarInfo::ID);
}
bool runOnMethod(Method *M) {
cerr << "Instr scheduling failed for method " << ((Value*)M)->getName()
<< "\n\n";
SchedGraphSet graphSet(M, Target);
for (SchedGraphSet::const_iterator GI=graphSet.begin();
GI != graphSet.end(); ++GI)
{
SchedGraph* graph = GI->second;
const vector<const BasicBlock*>& bbvec = graph->getBasicBlocks();
assert(bbvec.size() == 1 && "Cannot schedule multiple basic blocks");
const BasicBlock* bb = bbvec[0];
if (SchedDebugLevel >= Sched_PrintSchedGraphs) {
cerr << "\n*** SCHEDULING GRAPHS FOR INSTRUCTION SCHEDULING\n";
graphSet.dump();
}
for (SchedGraphSet::const_iterator GI=graphSet.begin();
GI != graphSet.end(); ++GI) {
SchedGraph* graph = GI->second;
const vector<const BasicBlock*> &bbvec = graph->getBasicBlocks();
assert(bbvec.size() == 1 && "Cannot schedule multiple basic blocks");
const BasicBlock* bb = bbvec[0];
if (SchedDebugLevel >= Sched_PrintSchedTrace)
cerr << "\n*** TRACE OF INSTRUCTION SCHEDULING OPERATIONS\n\n";
if (SchedDebugLevel >= Sched_PrintSchedTrace)
cerr << "\n*** TRACE OF INSTRUCTION SCHEDULING OPERATIONS\n\n";
SchedPriorities schedPrio(method, graph); // expensive!
SchedulingManager S(target, graph, schedPrio);
ChooseInstructionsForDelaySlots(S, bb, graph); // modifies graph
ForwardListSchedule(S); // computes schedule in S
RecordSchedule(GI->first, S); // records schedule in BB
// expensive!
SchedPriorities schedPrio(M, graph, getAnalysis<MethodLiveVarInfo>());
SchedulingManager S(Target, graph, schedPrio);
ChooseInstructionsForDelaySlots(S, bb, graph); // modifies graph
ForwardListSchedule(S); // computes schedule in S
RecordSchedule(GI->first, S); // records schedule in BB
}
if (SchedDebugLevel >= Sched_PrintMachineCode) {
cerr << "\n*** Machine instructions after INSTRUCTION SCHEDULING\n";
MachineCodeForMethod::get(M).dump();
}
return false;
}
if (SchedDebugLevel >= Sched_PrintMachineCode)
{
cerr << "\n*** Machine instructions after INSTRUCTION SCHEDULING\n";
MachineCodeForMethod::get(method).dump();
}
return false; // no reason to fail yet
};
} // end anonymous namespace
MethodPass *createInstructionSchedulingWithSSAPass(const TargetMachine &T) {
return new InstructionSchedulingWithSSA(T);
}

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@ -19,21 +19,18 @@
//**************************************************************************/
#include "SchedPriorities.h"
#include "llvm/Analysis/LiveVar/MethodLiveVarInfo.h"
#include "Support/PostOrderIterator.h"
#include <iostream>
using std::cerr;
SchedPriorities::SchedPriorities(const Method* method,
const SchedGraph* _graph)
: curTime(0),
graph(_graph),
methodLiveVarInfo(method), // expensive!
nodeDelayVec(_graph->getNumNodes(), INVALID_LATENCY), // make errors obvious
earliestForNode(_graph->getNumNodes(), 0),
SchedPriorities::SchedPriorities(const Method *method, const SchedGraph *G,
MethodLiveVarInfo &LVI)
: curTime(0), graph(G), methodLiveVarInfo(LVI),
nodeDelayVec(G->getNumNodes(), INVALID_LATENCY), // make errors obvious
earliestForNode(G->getNumNodes(), 0),
earliestReadyTime(0),
nextToTry(candsAsHeap.begin())
{
methodLiveVarInfo.analyze();
nextToTry(candsAsHeap.begin()) {
computeDelays(graph);
}

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@ -23,7 +23,6 @@
#include "SchedGraph.h"
#include "llvm/CodeGen/InstrScheduling.h"
#include "llvm/Analysis/LiveVar/MethodLiveVarInfo.h"
#include "llvm/Target/MachineSchedInfo.h"
#include "Support/CommandLine.h"
#include <list>
@ -31,6 +30,7 @@
class Method;
class MachineInstr;
class SchedulingManager;
class MethodLiveVarInfo;
//---------------------------------------------------------------------------
// Debug option levels for instruction scheduling
@ -124,8 +124,8 @@ private:
class SchedPriorities: public NonCopyable {
public:
/*ctor*/ SchedPriorities (const Method* method,
const SchedGraph* _graph);
SchedPriorities(const Method *M, const SchedGraph *G, MethodLiveVarInfo &LVI);
// This must be called before scheduling begins.
void initialize ();
@ -154,7 +154,7 @@ private:
private:
cycles_t curTime;
const SchedGraph* graph;
MethodLiveVarInfo methodLiveVarInfo;
MethodLiveVarInfo &methodLiveVarInfo;
std::hash_map<const MachineInstr*, bool> lastUseMap;
std::vector<cycles_t> nodeDelayVec;
std::vector<cycles_t> earliestForNode;