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* The itf exposed by InstrScheduling is now a single function to create the right pass
* InstructionScheduling is now a real pass * InstrSched _uses_ LiveVar analysis, instead of creating it's own copy many times through a loop. In this was LiveVarAnalysis is actually even SHARED by Register allocation. * SchedPriorities is now passed the live var information in llvm-svn: 1700
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@ -14,6 +14,7 @@
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/MachineCodeForInstruction.h"
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#include "llvm/CodeGen/MachineCodeForMethod.h"
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#include "llvm/Analysis/LiveVar/MethodLiveVarInfo.h" // FIXME: Remove when AnalysisUsage sets can be symbolic!
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/BasicBlock.h"
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#include "SchedPriorities.h"
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@ -1491,46 +1492,60 @@ instrIsFeasible(const SchedulingManager& S,
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// are still in SSA form.
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//---------------------------------------------------------------------------
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bool
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ScheduleInstructionsWithSSA(Method* method,
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const TargetMachine &target)
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{
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SchedGraphSet graphSet(method, target);
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if (SchedDebugLevel >= Sched_PrintSchedGraphs)
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{
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cerr << "\n*** SCHEDULING GRAPHS FOR INSTRUCTION SCHEDULING\n";
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graphSet.dump();
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namespace {
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class InstructionSchedulingWithSSA : public MethodPass {
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const TargetMachine &Target;
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public:
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inline InstructionSchedulingWithSSA(const TargetMachine &T) : Target(T) {}
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// getAnalysisUsageInfo - We use LiveVarInfo...
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virtual void getAnalysisUsageInfo(Pass::AnalysisSet &Requires,
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Pass::AnalysisSet &Destroyed,
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Pass::AnalysisSet &Provided) {
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Requires.push_back(MethodLiveVarInfo::ID);
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}
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bool runOnMethod(Method *M) {
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cerr << "Instr scheduling failed for method " << ((Value*)M)->getName()
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<< "\n\n";
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SchedGraphSet graphSet(M, Target);
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for (SchedGraphSet::const_iterator GI=graphSet.begin();
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GI != graphSet.end(); ++GI)
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{
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SchedGraph* graph = GI->second;
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const vector<const BasicBlock*>& bbvec = graph->getBasicBlocks();
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assert(bbvec.size() == 1 && "Cannot schedule multiple basic blocks");
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const BasicBlock* bb = bbvec[0];
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if (SchedDebugLevel >= Sched_PrintSchedGraphs) {
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cerr << "\n*** SCHEDULING GRAPHS FOR INSTRUCTION SCHEDULING\n";
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graphSet.dump();
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}
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for (SchedGraphSet::const_iterator GI=graphSet.begin();
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GI != graphSet.end(); ++GI) {
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SchedGraph* graph = GI->second;
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const vector<const BasicBlock*> &bbvec = graph->getBasicBlocks();
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assert(bbvec.size() == 1 && "Cannot schedule multiple basic blocks");
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const BasicBlock* bb = bbvec[0];
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if (SchedDebugLevel >= Sched_PrintSchedTrace)
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cerr << "\n*** TRACE OF INSTRUCTION SCHEDULING OPERATIONS\n\n";
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if (SchedDebugLevel >= Sched_PrintSchedTrace)
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cerr << "\n*** TRACE OF INSTRUCTION SCHEDULING OPERATIONS\n\n";
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SchedPriorities schedPrio(method, graph); // expensive!
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SchedulingManager S(target, graph, schedPrio);
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ChooseInstructionsForDelaySlots(S, bb, graph); // modifies graph
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ForwardListSchedule(S); // computes schedule in S
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RecordSchedule(GI->first, S); // records schedule in BB
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// expensive!
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SchedPriorities schedPrio(M, graph, getAnalysis<MethodLiveVarInfo>());
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SchedulingManager S(Target, graph, schedPrio);
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ChooseInstructionsForDelaySlots(S, bb, graph); // modifies graph
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ForwardListSchedule(S); // computes schedule in S
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RecordSchedule(GI->first, S); // records schedule in BB
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}
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if (SchedDebugLevel >= Sched_PrintMachineCode) {
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cerr << "\n*** Machine instructions after INSTRUCTION SCHEDULING\n";
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MachineCodeForMethod::get(M).dump();
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}
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return false;
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}
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if (SchedDebugLevel >= Sched_PrintMachineCode)
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{
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cerr << "\n*** Machine instructions after INSTRUCTION SCHEDULING\n";
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MachineCodeForMethod::get(method).dump();
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}
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return false; // no reason to fail yet
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};
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} // end anonymous namespace
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MethodPass *createInstructionSchedulingWithSSAPass(const TargetMachine &T) {
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return new InstructionSchedulingWithSSA(T);
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}
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@ -19,21 +19,18 @@
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//**************************************************************************/
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#include "SchedPriorities.h"
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#include "llvm/Analysis/LiveVar/MethodLiveVarInfo.h"
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#include "Support/PostOrderIterator.h"
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#include <iostream>
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using std::cerr;
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SchedPriorities::SchedPriorities(const Method* method,
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const SchedGraph* _graph)
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: curTime(0),
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graph(_graph),
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methodLiveVarInfo(method), // expensive!
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nodeDelayVec(_graph->getNumNodes(), INVALID_LATENCY), // make errors obvious
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earliestForNode(_graph->getNumNodes(), 0),
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SchedPriorities::SchedPriorities(const Method *method, const SchedGraph *G,
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MethodLiveVarInfo &LVI)
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: curTime(0), graph(G), methodLiveVarInfo(LVI),
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nodeDelayVec(G->getNumNodes(), INVALID_LATENCY), // make errors obvious
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earliestForNode(G->getNumNodes(), 0),
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earliestReadyTime(0),
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nextToTry(candsAsHeap.begin())
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{
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methodLiveVarInfo.analyze();
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nextToTry(candsAsHeap.begin()) {
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computeDelays(graph);
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}
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@ -23,7 +23,6 @@
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#include "SchedGraph.h"
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#include "llvm/CodeGen/InstrScheduling.h"
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#include "llvm/Analysis/LiveVar/MethodLiveVarInfo.h"
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#include "llvm/Target/MachineSchedInfo.h"
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#include "Support/CommandLine.h"
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#include <list>
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@ -31,6 +30,7 @@
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class Method;
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class MachineInstr;
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class SchedulingManager;
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class MethodLiveVarInfo;
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//---------------------------------------------------------------------------
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// Debug option levels for instruction scheduling
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@ -124,8 +124,8 @@ private:
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class SchedPriorities: public NonCopyable {
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public:
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/*ctor*/ SchedPriorities (const Method* method,
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const SchedGraph* _graph);
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SchedPriorities(const Method *M, const SchedGraph *G, MethodLiveVarInfo &LVI);
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// This must be called before scheduling begins.
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void initialize ();
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@ -154,7 +154,7 @@ private:
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private:
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cycles_t curTime;
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const SchedGraph* graph;
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MethodLiveVarInfo methodLiveVarInfo;
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MethodLiveVarInfo &methodLiveVarInfo;
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std::hash_map<const MachineInstr*, bool> lastUseMap;
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std::vector<cycles_t> nodeDelayVec;
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std::vector<cycles_t> earliestForNode;
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