RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-18 18:42:46 +02:00
Code Issues Projects Releases Wiki Activity

[SelectionDAG] GetDemandedBits - update SIGN_EXTEND_INREG op to just call SimplifyMultipleUseDemandedBits.

Browse Source 
llvm-svn: 367098
This commit is contained in:
Simon Pilgrim 2019-07-26 10:03:07 +00:00
parent 7af3343e54
commit 9d01600baf
1 changed files with 1 additions and 9 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
lib/CodeGen/SelectionDAG/SelectionDAG.cpp
View File

@ -2154,6 +2154,7 @@ SDValue SelectionDAG::GetDemandedBits(SDValue V, const APInt &DemandedBits,
}
case ISD::OR:
case ISD::XOR:
case ISD::SIGN_EXTEND_INREG:
return TLI->SimplifyMultipleUseDemandedBits(V, DemandedBits, DemandedElts,
*this, 0);
case ISD::SRL:
@ -2199,15 +2200,6 @@ SDValue SelectionDAG::GetDemandedBits(SDValue V, const APInt &DemandedBits,
return getNode(ISD::ANY_EXTEND, SDLoc(V), V.getValueType(), DemandedSrc);
break;
}
case ISD::SIGN_EXTEND_INREG:
EVT ExVT = cast<VTSDNode>(V.getOperand(1))->getVT();
unsigned ExVTBits = ExVT.getScalarSizeInBits();
// If none of the extended bits are demanded, eliminate the sextinreg.
if (DemandedBits.getActiveBits() <= ExVTBits)
return V.getOperand(0);
break;
}
return SDValue();
}