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Pass i64 values correctly split in reg/mem to fastcc calls.
This fixes fourinarow with -enable-x86-fastcc. llvm-svn: 22022
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@ -750,8 +750,7 @@ X86TargetLowering::LowerFastCCCallTo(SDOperand Chain, const Type *RetTy,
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SDOperand PtrOff = DAG.getConstant(ArgOffset, getPointerTy());
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PtrOff = DAG.getNode(ISD::ADD, MVT::i32, StackPtr, PtrOff);
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Stores.push_back(DAG.getNode(ISD::STORE, MVT::Other, Chain,
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Args[i].first, PtrOff,
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DAG.getSrcValue(NULL)));
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Hi, PtrOff, DAG.getSrcValue(NULL)));
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ArgOffset += 4;
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}
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break;
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