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Remove dead function.
llvm-svn: 185731
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9afbde4cba
commit
9d2c118af7
@ -908,11 +908,6 @@ public:
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bool isSafeToMove(const TargetInstrInfo *TII, AliasAnalysis *AA,
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bool &SawStore) const;
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/// isSafeToReMat - Return true if it's safe to rematerialize the specified
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/// instruction which defined the specified register instead of copying it.
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bool isSafeToReMat(const TargetInstrInfo *TII, AliasAnalysis *AA,
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unsigned DstReg) const;
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/// hasOrderedMemoryRef - Return true if this instruction may have an ordered
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/// or volatile memory reference, or if the information describing the memory
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/// reference is not available. Return false if it is known to have no
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@ -1253,32 +1253,6 @@ bool MachineInstr::isSafeToMove(const TargetInstrInfo *TII,
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return true;
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}
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/// isSafeToReMat - Return true if it's safe to rematerialize the specified
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/// instruction which defined the specified register instead of copying it.
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bool MachineInstr::isSafeToReMat(const TargetInstrInfo *TII,
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AliasAnalysis *AA,
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unsigned DstReg) const {
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bool SawStore = false;
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if (!TII->isTriviallyReMaterializable(this, AA) ||
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!isSafeToMove(TII, AA, SawStore))
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return false;
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for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
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const MachineOperand &MO = getOperand(i);
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if (!MO.isReg())
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continue;
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// FIXME: For now, do not remat any instruction with register operands.
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// Later on, we can loosen the restriction is the register operands have
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// not been modified between the def and use. Note, this is different from
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// MachineSink because the code is no longer in two-address form (at least
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// partially).
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if (MO.isUse())
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return false;
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else if (!MO.isDead() && MO.getReg() != DstReg)
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return false;
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}
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return true;
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}
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/// hasOrderedMemoryRef - Return true if this instruction may have an ordered
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/// or volatile memory reference, or if the information describing the memory
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/// reference is not available. Return false if it is known to have no ordered
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