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[X86] Add test case for future MULFIX DAG combine folds. NFC
Add some test cases displaying the lack of DAG combine folds for SMULFIX/UMULFIX/SMULFIXSAT when either multiplicand is undef or zero. It seems like widening vector legalization for X86 can introduce fixed point multiplication of undef values. So that is one way that such operations could appear during ISel. Multiplication with zero is probably more unlikely, and could potentially be handled by InstCombine. But I do not think it would hurt to do such folds in DAGCombiner. This patch only adds the test case. The folds will be added in a follow up patch. llvm-svn: 369102
This commit is contained in:
Bjorn Pettersson
parent
c40c592399
commit
9d4e6430d2
206
test/CodeGen/X86/mulfix_combine.ll
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206
test/CodeGen/X86/mulfix_combine.ll
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@ -0,0 +1,206 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-linux -o - | FileCheck %s
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declare i32 @llvm.smul.fix.i32(i32, i32, i32 immarg)
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declare i32 @llvm.umul.fix.i32(i32, i32, i32 immarg)
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declare i32 @llvm.smul.fix.sat.i32(i32, i32, i32 immarg)
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declare <4 x i32> @llvm.smul.fix.v4i32(<4 x i32>, <4 x i32>, i32 immarg)
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declare <4 x i32> @llvm.umul.fix.v4i32(<4 x i32>, <4 x i32>, i32 immarg)
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declare <4 x i32> @llvm.smul.fix.sat.v4i32(<4 x i32>, <4 x i32>, i32 immarg)
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define i32 @smulfix_undef(i32 %y) nounwind {
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; CHECK-LABEL: smulfix_undef:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: shrdl $2, %eax, %eax
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; CHECK-NEXT: retq
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%tmp = call i32 @llvm.smul.fix.i32(i32 undef, i32 %y, i32 2)
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ret i32 %tmp
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}
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define i32 @smulfix_zero(i32 %y) nounwind {
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; CHECK-LABEL: smulfix_zero:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: shrdl $2, %eax, %eax
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; CHECK-NEXT: retq
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%tmp = call i32 @llvm.smul.fix.i32(i32 0, i32 %y, i32 2)
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ret i32 %tmp
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}
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define i32 @umulfix_undef(i32 %y) nounwind {
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; CHECK-LABEL: umulfix_undef:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: shrdl $2, %eax, %eax
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; CHECK-NEXT: retq
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%tmp = call i32 @llvm.umul.fix.i32(i32 undef, i32 %y, i32 2)
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ret i32 %tmp
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}
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define i32 @umulfix_zero(i32 %y) nounwind {
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; CHECK-LABEL: umulfix_zero:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: shrdl $2, %eax, %eax
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; CHECK-NEXT: retq
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%tmp = call i32 @llvm.umul.fix.i32(i32 0, i32 %y, i32 2)
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ret i32 %tmp
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}
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define i32 @smulfixsat_undef(i32 %y) nounwind {
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; CHECK-LABEL: smulfixsat_undef:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: shrdl $2, %eax, %eax
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; CHECK-NEXT: movl $1, %ecx
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; CHECK-NEXT: negl %ecx
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; CHECK-NEXT: movl $2147483647, %ecx # imm = 0x7FFFFFFF
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; CHECK-NEXT: cmovlel %eax, %ecx
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; CHECK-NEXT: movl $-2, %eax
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; CHECK-NEXT: negl %eax
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; CHECK-NEXT: movl $-2147483648, %eax # imm = 0x80000000
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; CHECK-NEXT: cmovgel %ecx, %eax
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; CHECK-NEXT: retq
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%tmp = call i32 @llvm.smul.fix.sat.i32(i32 undef, i32 %y, i32 2)
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ret i32 %tmp
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}
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define i32 @smulfixsat_zero(i32 %y) nounwind {
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; CHECK-LABEL: smulfixsat_zero:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: shrdl $2, %eax, %eax
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; CHECK-NEXT: movl $1, %ecx
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; CHECK-NEXT: negl %ecx
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; CHECK-NEXT: movl $2147483647, %ecx # imm = 0x7FFFFFFF
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; CHECK-NEXT: cmovlel %eax, %ecx
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; CHECK-NEXT: movl $-2, %eax
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; CHECK-NEXT: negl %eax
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; CHECK-NEXT: movl $-2147483648, %eax # imm = 0x80000000
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; CHECK-NEXT: cmovgel %ecx, %eax
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; CHECK-NEXT: retq
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%tmp = call i32 @llvm.smul.fix.sat.i32(i32 0, i32 %y, i32 2)
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ret i32 %tmp
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}
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define <4 x i32> @vec_smulfix_undef(<4 x i32> %y) nounwind {
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; CHECK-LABEL: vec_smulfix_undef:
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; CHECK: # %bb.0:
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; CHECK-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
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; CHECK-NEXT: pxor %xmm2, %xmm2
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; CHECK-NEXT: pcmpgtd %xmm0, %xmm2
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; CHECK-NEXT: pand %xmm0, %xmm2
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; CHECK-NEXT: pmuludq %xmm0, %xmm0
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; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,3,2,3]
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; CHECK-NEXT: pmuludq %xmm0, %xmm1
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; CHECK-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,3,2,3]
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; CHECK-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
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; CHECK-NEXT: psubd %xmm2, %xmm0
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; CHECK-NEXT: pslld $30, %xmm0
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; CHECK-NEXT: retq
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%tmp = call <4 x i32> @llvm.smul.fix.v4i32(<4 x i32> undef, <4 x i32> %y, i32 2)
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ret <4 x i32> %tmp
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}
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define <4 x i32> @vec_smulfix_zero(<4 x i32> %y) nounwind {
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; CHECK-LABEL: vec_smulfix_zero:
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; CHECK: # %bb.0:
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; CHECK-NEXT: pxor %xmm1, %xmm1
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; CHECK-NEXT: pxor %xmm2, %xmm2
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; CHECK-NEXT: pmuludq %xmm0, %xmm2
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; CHECK-NEXT: pshufd {{.*#+}} xmm3 = xmm2[0,2,2,3]
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; CHECK-NEXT: pshufd {{.*#+}} xmm4 = xmm0[1,1,3,3]
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; CHECK-NEXT: pmuludq %xmm1, %xmm4
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; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm4[0,2,2,3]
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; CHECK-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm0[0],xmm3[1],xmm0[1]
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; CHECK-NEXT: psrld $2, %xmm3
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; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm2[1,3,2,3]
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; CHECK-NEXT: pshufd {{.*#+}} xmm1 = xmm4[1,3,2,3]
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; CHECK-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
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; CHECK-NEXT: pslld $30, %xmm0
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; CHECK-NEXT: por %xmm3, %xmm0
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; CHECK-NEXT: retq
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%tmp = call <4 x i32> @llvm.smul.fix.v4i32(<4 x i32> <i32 0, i32 0, i32 0, i32 0>, <4 x i32> %y, i32 2)
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ret <4 x i32> %tmp
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}
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define <4 x i32> @vec_umulfix_undef(<4 x i32> %y) nounwind {
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; CHECK-LABEL: vec_umulfix_undef:
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; CHECK: # %bb.0:
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; CHECK-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
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; CHECK-NEXT: pmuludq %xmm0, %xmm0
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; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,3,2,3]
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; CHECK-NEXT: pmuludq %xmm0, %xmm1
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; CHECK-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,3,2,3]
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; CHECK-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
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; CHECK-NEXT: pslld $30, %xmm0
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; CHECK-NEXT: retq
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%tmp = call <4 x i32> @llvm.umul.fix.v4i32(<4 x i32> undef, <4 x i32> %y, i32 2)
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ret <4 x i32> %tmp
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}
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define <4 x i32> @vec_umulfix_zero(<4 x i32> %y) nounwind {
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; CHECK-LABEL: vec_umulfix_zero:
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; CHECK: # %bb.0:
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; CHECK-NEXT: pxor %xmm1, %xmm1
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; CHECK-NEXT: pxor %xmm2, %xmm2
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; CHECK-NEXT: pmuludq %xmm0, %xmm2
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; CHECK-NEXT: pshufd {{.*#+}} xmm3 = xmm2[0,2,2,3]
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; CHECK-NEXT: pshufd {{.*#+}} xmm4 = xmm0[1,1,3,3]
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; CHECK-NEXT: pmuludq %xmm1, %xmm4
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; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm4[0,2,2,3]
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; CHECK-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm0[0],xmm3[1],xmm0[1]
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; CHECK-NEXT: psrld $2, %xmm3
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; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm2[1,3,2,3]
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; CHECK-NEXT: pshufd {{.*#+}} xmm1 = xmm4[1,3,2,3]
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; CHECK-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
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; CHECK-NEXT: pslld $30, %xmm0
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; CHECK-NEXT: por %xmm3, %xmm0
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; CHECK-NEXT: retq
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%tmp = call <4 x i32> @llvm.umul.fix.v4i32(<4 x i32> <i32 0, i32 0, i32 0, i32 0>, <4 x i32> %y, i32 2)
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ret <4 x i32> %tmp
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}
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define <4 x i32> @vec_smulfixsat_undef(<4 x i32> %y) nounwind {
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; CHECK-LABEL: vec_smulfixsat_undef:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: shrdl $2, %eax, %eax
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; CHECK-NEXT: movl $1, %ecx
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; CHECK-NEXT: negl %ecx
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; CHECK-NEXT: movl $2147483647, %ecx # imm = 0x7FFFFFFF
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; CHECK-NEXT: cmovlel %eax, %ecx
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; CHECK-NEXT: movl $-2, %eax
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; CHECK-NEXT: negl %eax
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; CHECK-NEXT: movl $-2147483648, %eax # imm = 0x80000000
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; CHECK-NEXT: cmovgel %ecx, %eax
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; CHECK-NEXT: movd %eax, %xmm0
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; CHECK-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0,0,1,1]
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; CHECK-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0,0]
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; CHECK-NEXT: retq
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%tmp = call <4 x i32> @llvm.smul.fix.sat.v4i32(<4 x i32> undef, <4 x i32> %y, i32 2)
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ret <4 x i32> %tmp
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}
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define <4 x i32> @vec_smulfixsat_zero(<4 x i32> %y) nounwind {
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; CHECK-LABEL: vec_smulfixsat_zero:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: shrdl $2, %eax, %eax
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; CHECK-NEXT: movl $1, %ecx
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; CHECK-NEXT: negl %ecx
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; CHECK-NEXT: movl $2147483647, %ecx # imm = 0x7FFFFFFF
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; CHECK-NEXT: cmovlel %eax, %ecx
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; CHECK-NEXT: movl $-2, %eax
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; CHECK-NEXT: negl %eax
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; CHECK-NEXT: movl $-2147483648, %eax # imm = 0x80000000
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; CHECK-NEXT: cmovgel %ecx, %eax
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; CHECK-NEXT: movd %eax, %xmm0
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; CHECK-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0,0,1,1]
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; CHECK-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0,0]
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; CHECK-NEXT: retq
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%tmp = call <4 x i32> @llvm.smul.fix.sat.v4i32(<4 x i32> <i32 0, i32 0, i32 0, i32 0>, <4 x i32> %y, i32 2)
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ret <4 x i32> %tmp
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}
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