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[PowerPC] No CTR loop if the candidate exiting block is in a different loop
The CTR loops pass will insert the decrementing branch instruction in an exiting block for the loop being transformed. However if that block is part of another loop as well (whether a nested loop or with irreducible CFG), it is not valid to use that exiting block. In fact, if the loop hass irreducible CFG, we don't bother analyzing it and we just bail on the transformation. In practice, this doesn't lead to a noticeable reduction in the number of loops transformed by this pass. Fixes https://bugs.llvm.org/show_bug.cgi?id=37229 Differential Revision: https://reviews.llvm.org/D46162 llvm-svn: 331410
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@ -30,8 +30,10 @@
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#include "llvm/ADT/STLExtras.h"
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#include "llvm/ADT/Statistic.h"
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#include "llvm/Analysis/AssumptionCache.h"
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#include "llvm/Analysis/CFG.h"
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#include "llvm/Analysis/CodeMetrics.h"
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#include "llvm/Analysis/LoopInfo.h"
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#include "llvm/Analysis/LoopIterator.h"
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#include "llvm/Analysis/ScalarEvolutionExpander.h"
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#include "llvm/Analysis/TargetLibraryInfo.h"
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#include "llvm/Analysis/TargetTransformInfo.h"
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@ -512,6 +514,12 @@ bool PPCCTRLoops::convertToCTRLoop(Loop *L) {
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if (MadeChange)
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return MadeChange;
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// Bail out if the loop has irreducible control flow.
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LoopBlocksRPO RPOT(L);
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RPOT.perform(LI);
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if (containsIrreducibleCFG<const BasicBlock *>(RPOT, *LI))
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return false;
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#ifndef NDEBUG
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// Stop trying after reaching the limit (if any).
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int Limit = CTRLoopLimit;
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@ -572,6 +580,12 @@ bool PPCCTRLoops::convertToCTRLoop(Loop *L) {
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if (SE->getTypeSizeInBits(EC->getType()) > (TM->isPPC64() ? 64 : 32))
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continue;
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// If this exiting block is contained in a nested loop, it is not eligible
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// for insertion of the branch-and-decrement since the inner loop would
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// end up messing up the value in the CTR.
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if (LI->getLoopFor(*I) != L)
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continue;
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// We now have a loop-invariant count of loop iterations (which is not the
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// constant zero) for which we know that this loop will not exit via this
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// exisiting block.
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67
test/CodeGen/PowerPC/no-ctr-loop-if-exit-in-nested-loop.ll
Normal file
67
test/CodeGen/PowerPC/no-ctr-loop-if-exit-in-nested-loop.ll
Normal file
@ -0,0 +1,67 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mcpu=pwr8 -mtriple=powerpc64le-unknown-unknown \
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; RUN: -verify-machineinstrs < %s | FileCheck %s
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define signext i32 @test(i32* noalias %PtrA, i32* noalias %PtrB, i32 signext %LenA, i32 signext %LenB) #0 {
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; CHECK-LABEL: test:
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; CHECK-NOT: mtctr
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; CHECK-NOT: bdnz
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; CHECK-NOT: bdz
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; CHECK: blr
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entry:
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br label %block2
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block2: ; preds = %entry
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br label %block3
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block3: ; preds = %block8, %block2
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%OuterInd.0 = phi i32 [ 0, %block2 ], [ %inc, %block8 ]
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%InnerInd.0 = phi i32 [ 0, %block2 ], [ %inc1, %block8 ]
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%inc = add nsw i32 %OuterInd.0, 1
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br label %block4
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block4: ; preds = %if.then4, %block3
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%InnerInd.1 = phi i32 [ %InnerInd.0, %block3 ], [ %inc1, %if.then4 ]
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%cmp = icmp sge i32 %inc, %LenA
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br i1 %cmp, label %if.then, label %if.end
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if.then: ; preds = %block4
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%sub = sub nsw i32 %inc, 1
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%idxprom = sext i32 %sub to i64
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%arrayidx = getelementptr inbounds i32, i32* %PtrA, i64 %idxprom
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%0 = load i32, i32* %arrayidx, align 4
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ret i32 %0
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if.end: ; preds = %block4
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br label %block5
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block5: ; preds = %if.end
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%inc1 = add nsw i32 %InnerInd.1, 1
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%idxprom2 = sext i32 %InnerInd.1 to i64
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%arrayidx3 = getelementptr inbounds i32, i32* %PtrB, i64 %idxprom2
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%1 = load i32, i32* %arrayidx3, align 4
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%tobool = icmp ne i32 %1, 0
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br i1 %tobool, label %if.then4, label %if.end9
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if.then4: ; preds = %block5
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%idxprom5 = sext i32 %inc to i64
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%arrayidx6 = getelementptr inbounds i32, i32* %PtrA, i64 %idxprom5
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%2 = load i32, i32* %arrayidx6, align 4
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%idxprom7 = sext i32 %inc1 to i64
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%arrayidx8 = getelementptr inbounds i32, i32* %PtrB, i64 %idxprom7
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store i32 %2, i32* %arrayidx8, align 4
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br label %block4
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if.end9: ; preds = %block5
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br label %block6
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block6: ; preds = %if.end9
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%idxprom10 = sext i32 %inc to i64
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%arrayidx11 = getelementptr inbounds i32, i32* %PtrA, i64 %idxprom10
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%3 = load i32, i32* %arrayidx11, align 4
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%inc12 = add nsw i32 %3, 1
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store i32 %inc12, i32* %arrayidx11, align 4
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br label %block8
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block8: ; preds = %block6
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br label %block3
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}
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