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[X86][SSE] Add PR22415 test case
llvm-svn: 313755
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@ -688,3 +688,25 @@ define <16 x i8> @constant_fold_pshufb_2() {
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%1 = tail call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> <i8 2, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0>, <16 x i8> <i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>)
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ret <16 x i8> %1
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}
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define i32 @PR22415(double %a0) {
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; SSE-LABEL: PR22415:
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; SSE: # BB#0:
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; SSE-NEXT: pshufb {{.*#+}} xmm0 = xmm0[0,2,4,u,u,u,u,u,u,u,u,u,u,u,u,u]
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; SSE-NEXT: movd %xmm0, %eax
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; SSE-NEXT: andl $16777215, %eax # imm = 0xFFFFFF
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; SSE-NEXT: retq
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;
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; AVX-LABEL: PR22415:
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; AVX: # BB#0:
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; AVX-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,u,u,u,u,u,u,u,u,u,u,u,u,u]
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; AVX-NEXT: vmovd %xmm0, %eax
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; AVX-NEXT: andl $16777215, %eax # imm = 0xFFFFFF
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; AVX-NEXT: retq
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%1 = bitcast double %a0 to <8 x i8>
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%2 = shufflevector <8 x i8> %1, <8 x i8> undef, <4 x i32> <i32 0, i32 2, i32 4, i32 undef>
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%3 = shufflevector <4 x i8> %2, <4 x i8> undef, <3 x i32> <i32 0, i32 1, i32 2>
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%4 = bitcast <3 x i8> %3 to i24
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%5 = zext i24 %4 to i32
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ret i32 %5
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}
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