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[X86][SSE] Add PR22415 test case

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llvm-svn: 313755
This commit is contained in:
Simon Pilgrim 2017-09-20 13:49:52 +00:00
parent ae1097a240
commit 9de2bddca5
1 changed files with 22 additions and 0 deletions
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22
test/CodeGen/X86/vector-shuffle-combining-ssse3.ll
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@ -688,3 +688,25 @@ define <16 x i8> @constant_fold_pshufb_2() {
%1 = tail call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> <i8 2, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0>, <16 x i8> <i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>) %1 = tail call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> <i8 2, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0>, <16 x i8> <i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>)
ret <16 x i8> %1 ret <16 x i8> %1
} }
define i32 @PR22415(double %a0) {
; SSE-LABEL: PR22415:
; SSE: # BB#0:
; SSE-NEXT: pshufb {{.*#+}} xmm0 = xmm0[0,2,4,u,u,u,u,u,u,u,u,u,u,u,u,u]
; SSE-NEXT: movd %xmm0, %eax
; SSE-NEXT: andl $16777215, %eax # imm = 0xFFFFFF
; SSE-NEXT: retq
;
; AVX-LABEL: PR22415:
; AVX: # BB#0:
; AVX-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,u,u,u,u,u,u,u,u,u,u,u,u,u]
; AVX-NEXT: vmovd %xmm0, %eax
; AVX-NEXT: andl $16777215, %eax # imm = 0xFFFFFF
; AVX-NEXT: retq
%1 = bitcast double %a0 to <8 x i8>
%2 = shufflevector <8 x i8> %1, <8 x i8> undef, <4 x i32> <i32 0, i32 2, i32 4, i32 undef>
%3 = shufflevector <4 x i8> %2, <4 x i8> undef, <3 x i32> <i32 0, i32 1, i32 2>
%4 = bitcast <3 x i8> %3 to i24
%5 = zext i24 %4 to i32
ret i32 %5
}