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[StructurizeCFG] Fix region nodes ordering
This is a reimplementation of the `orderNodes` function, as the old implementation didn't take into account all cases. The new implementation uses SCCs instead of Loops to take account of irreducible loops. Fix PR41509 Differential Revision: https://reviews.llvm.org/D79037
This commit is contained in:
Ehud Katz
parent
ac85d75310
commit
9df1915a6d
@ -8,13 +8,12 @@
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#include "llvm/ADT/DenseMap.h"
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#include "llvm/ADT/MapVector.h"
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#include "llvm/ADT/PostOrderIterator.h"
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#include "llvm/ADT/SCCIterator.h"
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#include "llvm/ADT/STLExtras.h"
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#include "llvm/ADT/SmallPtrSet.h"
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/Analysis/InstructionSimplify.h"
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#include "llvm/Analysis/LegacyDivergenceAnalysis.h"
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#include "llvm/Analysis/LoopInfo.h"
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#include "llvm/Analysis/RegionInfo.h"
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#include "llvm/Analysis/RegionIterator.h"
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#include "llvm/Analysis/RegionPass.h"
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@ -90,6 +89,59 @@ using BBPredicates = DenseMap<BasicBlock *, Value *>;
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using PredMap = DenseMap<BasicBlock *, BBPredicates>;
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using BB2BBMap = DenseMap<BasicBlock *, BasicBlock *>;
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// A traits type that is intended to be used in graph algorithms. The graph
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// traits starts at an entry node, and traverses the RegionNodes that are in
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// the Nodes set.
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struct SubGraphTraits {
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using NodeRef = std::pair<RegionNode *, SmallDenseSet<RegionNode *> *>;
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using BaseSuccIterator = GraphTraits<RegionNode *>::ChildIteratorType;
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// This wraps a set of Nodes into the iterator, so we know which edges to
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// filter out.
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class WrappedSuccIterator
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: public iterator_adaptor_base<
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WrappedSuccIterator, BaseSuccIterator,
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typename std::iterator_traits<BaseSuccIterator>::iterator_category,
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NodeRef, std::ptrdiff_t, NodeRef *, NodeRef> {
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SmallDenseSet<RegionNode *> *Nodes;
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public:
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WrappedSuccIterator(BaseSuccIterator It, SmallDenseSet<RegionNode *> *Nodes)
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: iterator_adaptor_base(It), Nodes(Nodes) {}
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NodeRef operator*() const { return {*I, Nodes}; }
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};
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static bool filterAll(const NodeRef &N) { return true; }
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static bool filterSet(const NodeRef &N) { return N.second->count(N.first); }
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using ChildIteratorType =
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filter_iterator<WrappedSuccIterator, bool (*)(const NodeRef &)>;
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static NodeRef getEntryNode(Region *R) {
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return {GraphTraits<Region *>::getEntryNode(R), nullptr};
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}
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static NodeRef getEntryNode(NodeRef N) { return N; }
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static iterator_range<ChildIteratorType> children(const NodeRef &N) {
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auto *filter = N.second ? &filterSet : &filterAll;
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return make_filter_range(
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make_range<WrappedSuccIterator>(
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{GraphTraits<RegionNode *>::child_begin(N.first), N.second},
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{GraphTraits<RegionNode *>::child_end(N.first), N.second}),
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filter);
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}
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static ChildIteratorType child_begin(const NodeRef &N) {
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return children(N).begin();
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}
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static ChildIteratorType child_end(const NodeRef &N) {
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return children(N).end();
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}
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};
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/// Finds the nearest common dominator of a set of BasicBlocks.
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///
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/// For every BB you add to the set, you can specify whether we "remember" the
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@ -194,7 +246,6 @@ class StructurizeCFG : public RegionPass {
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LegacyDivergenceAnalysis *DA;
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DominatorTree *DT;
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LoopInfo *LI;
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SmallVector<RegionNode *, 8> Order;
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BBSet Visited;
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@ -214,9 +265,6 @@ class StructurizeCFG : public RegionPass {
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void orderNodes();
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Loop *getAdjustedLoop(RegionNode *RN);
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unsigned getAdjustedLoopDepth(RegionNode *RN);
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void analyzeLoops(RegionNode *N);
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Value *buildCondition(BranchInst *Term, unsigned Idx, bool Invert);
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@ -282,7 +330,6 @@ public:
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AU.addRequired<LegacyDivergenceAnalysis>();
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AU.addRequiredID(LowerSwitchID);
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AU.addRequired<DominatorTreeWrapperPass>();
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AU.addRequired<LoopInfoWrapperPass>();
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AU.addPreserved<DominatorTreeWrapperPass>();
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RegionPass::getAnalysisUsage(AU);
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@ -314,75 +361,60 @@ bool StructurizeCFG::doInitialization(Region *R, RGPassManager &RGM) {
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return false;
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}
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/// Use the exit block to determine the loop if RN is a SubRegion.
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Loop *StructurizeCFG::getAdjustedLoop(RegionNode *RN) {
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if (RN->isSubRegion()) {
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Region *SubRegion = RN->getNodeAs<Region>();
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return LI->getLoopFor(SubRegion->getExit());
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}
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return LI->getLoopFor(RN->getEntry());
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}
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/// Use the exit block to determine the loop depth if RN is a SubRegion.
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unsigned StructurizeCFG::getAdjustedLoopDepth(RegionNode *RN) {
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if (RN->isSubRegion()) {
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Region *SubR = RN->getNodeAs<Region>();
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return LI->getLoopDepth(SubR->getExit());
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}
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return LI->getLoopDepth(RN->getEntry());
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}
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/// Build up the general order of nodes
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/// Build up the general order of nodes, by performing a topology sort of the
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/// parent region's nodes, while ensuring that there is no outer cycle node
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/// between any two inner cycle nodes.
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void StructurizeCFG::orderNodes() {
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ReversePostOrderTraversal<Region*> RPOT(ParentRegion);
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SmallDenseMap<Loop*, unsigned, 8> LoopBlocks;
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Order.resize(std::distance(GraphTraits<Region *>::nodes_begin(ParentRegion),
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GraphTraits<Region *>::nodes_end(ParentRegion)));
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if (Order.empty())
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return;
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// The reverse post-order traversal of the list gives us an ordering close
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// to what we want. The only problem with it is that sometimes backedges
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// for outer loops will be visited before backedges for inner loops.
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for (RegionNode *RN : RPOT) {
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Loop *Loop = getAdjustedLoop(RN);
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++LoopBlocks[Loop];
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}
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SmallDenseSet<RegionNode *> Nodes;
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auto EntryNode = SubGraphTraits::getEntryNode(ParentRegion);
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unsigned CurrentLoopDepth = 0;
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Loop *CurrentLoop = nullptr;
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for (auto I = RPOT.begin(), E = RPOT.end(); I != E; ++I) {
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RegionNode *RN = cast<RegionNode>(*I);
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unsigned LoopDepth = getAdjustedLoopDepth(RN);
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// A list of range indices of SCCs in Order, to be processed.
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SmallVector<std::pair<unsigned, unsigned>, 8> WorkList;
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unsigned I = 0, E = Order.size();
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while (true) {
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// Run through all the SCCs in the subgraph starting with Entry.
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for (auto SCCI =
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scc_iterator<SubGraphTraits::NodeRef, SubGraphTraits>::begin(
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EntryNode);
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!SCCI.isAtEnd(); ++SCCI) {
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auto &SCC = *SCCI;
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if (is_contained(Order, *I))
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continue;
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// An SCC up to the size of 2, can be reduced to an entry (the last node),
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// and a possible additional node. Therefore, it is already in order, and
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// there is no need to add it to the work-list.
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unsigned Size = SCC.size();
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if (Size > 2)
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WorkList.emplace_back(I, I + Size);
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if (LoopDepth < CurrentLoopDepth) {
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// Make sure we have visited all blocks in this loop before moving back to
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// the outer loop.
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auto LoopI = I;
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while (unsigned &BlockCount = LoopBlocks[CurrentLoop]) {
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LoopI++;
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if (getAdjustedLoop(cast<RegionNode>(*LoopI)) == CurrentLoop) {
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--BlockCount;
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Order.push_back(*LoopI);
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}
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// Add the SCC nodes to the Order array.
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for (auto &N : SCC) {
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assert(I < E && "SCC size mismatch!");
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Order[I++] = N.first;
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}
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}
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assert(I == E && "SCC size mismatch!");
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CurrentLoop = getAdjustedLoop(RN);
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if (CurrentLoop)
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LoopBlocks[CurrentLoop]--;
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// If there are no more SCCs to order, then we are done.
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if (WorkList.empty())
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break;
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CurrentLoopDepth = LoopDepth;
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Order.push_back(*I);
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std::tie(I, E) = WorkList.pop_back_val();
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// Collect the set of nodes in the SCC's subgraph. These are only the
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// possible child nodes; we do not add the entry (last node) otherwise we
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// will have the same exact SCC all over again.
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Nodes.clear();
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Nodes.insert(Order.begin() + I, Order.begin() + E - 1);
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// Update the entry node.
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EntryNode.first = Order[E - 1];
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EntryNode.second = &Nodes;
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}
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// This pass originally used a post-order traversal and then operated on
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// the list in reverse. Now that we are using a reverse post-order traversal
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// rather than re-working the whole pass to operate on the list in order,
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// we just reverse the list and continue to operate on it in reverse.
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std::reverse(Order.begin(), Order.end());
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}
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/// Determine the end of the loops
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@ -490,8 +522,7 @@ void StructurizeCFG::collectInfos() {
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for (RegionNode *RN : reverse(Order)) {
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LLVM_DEBUG(dbgs() << "Visiting: "
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<< (RN->isSubRegion() ? "SubRegion with entry: " : "")
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<< RN->getEntry()->getName() << " Loop Depth: "
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<< LI->getLoopDepth(RN->getEntry()) << "\n");
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<< RN->getEntry()->getName() << "\n");
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// Analyze all the conditions leading to a node
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gatherPredicates(RN);
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@ -1013,7 +1044,6 @@ bool StructurizeCFG::runOnRegion(Region *R, RGPassManager &RGM) {
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ParentRegion = R;
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DT = &getAnalysis<DominatorTreeWrapperPass>().getDomTree();
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LI = &getAnalysis<LoopInfoWrapperPass>().getLoopInfo();
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orderNodes();
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collectInfos();
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262
test/Transforms/StructurizeCFG/interleaved-loop-order.ll
Normal file
262
test/Transforms/StructurizeCFG/interleaved-loop-order.ll
Normal file
@ -0,0 +1,262 @@
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -S -structurizecfg %s -o - | FileCheck %s
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; This test have an outer loop containing an inner loop,
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; for which there is an interleaved post-order traversal.
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;
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; This used to produce incorrect code.
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; For example %outer.loop.body used to branched to %inner.loop.end
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; (instead of %inner.loop.header).
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define i1 @test_nested(i32 %x, i1 %b1, i1 %b2, i1 %b3) {
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; CHECK-LABEL: @test_nested(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[B3_INV:%.*]] = xor i1 [[B3:%.*]], true
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; CHECK-NEXT: br label [[OUTER_LOOP_HEADER:%.*]]
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; CHECK: Flow12:
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; CHECK-NEXT: br i1 [[TMP3:%.*]], label [[EXIT_TRUE:%.*]], label [[FLOW13:%.*]]
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; CHECK: exit.true:
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; CHECK-NEXT: br label [[FLOW13]]
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; CHECK: Flow13:
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; CHECK-NEXT: br i1 [[TMP2:%.*]], label [[NEWDEFAULT:%.*]], label [[FLOW14:%.*]]
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; CHECK: NewDefault:
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; CHECK-NEXT: br label [[EXIT_FALSE:%.*]]
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; CHECK: Flow14:
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; CHECK-NEXT: [[TMP0:%.*]] = phi i1 [ false, [[EXIT_FALSE]] ], [ true, [[FLOW13]] ]
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; CHECK-NEXT: br label [[EXIT:%.*]]
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; CHECK: exit.false:
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; CHECK-NEXT: br label [[FLOW14]]
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; CHECK: outer.loop.header:
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; CHECK-NEXT: br i1 [[B1:%.*]], label [[OUTER_LOOP_BODY:%.*]], label [[FLOW3:%.*]]
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; CHECK: outer.loop.body:
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; CHECK-NEXT: br label [[INNER_LOOP_HEADER:%.*]]
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; CHECK: Flow3:
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; CHECK-NEXT: [[TMP1:%.*]] = phi i1 [ [[TMP16:%.*]], [[FLOW11:%.*]] ], [ true, [[OUTER_LOOP_HEADER]] ]
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; CHECK-NEXT: [[TMP2]] = phi i1 [ [[TMP12:%.*]], [[FLOW11]] ], [ false, [[OUTER_LOOP_HEADER]] ]
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; CHECK-NEXT: [[TMP3]] = phi i1 [ false, [[FLOW11]] ], [ true, [[OUTER_LOOP_HEADER]] ]
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; CHECK-NEXT: br i1 [[TMP1]], label [[FLOW12:%.*]], label [[OUTER_LOOP_HEADER]]
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; CHECK: inner.loop.header:
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; CHECK-NEXT: [[TMP4:%.*]] = phi i1 [ [[TMP8:%.*]], [[FLOW4:%.*]] ], [ false, [[OUTER_LOOP_BODY]] ]
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; CHECK-NEXT: br i1 [[B2:%.*]], label [[INNER_LOOP_BODY:%.*]], label [[FLOW4]]
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; CHECK: Flow6:
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; CHECK-NEXT: [[TMP5:%.*]] = phi i1 [ false, [[INNER_LOOP_LATCH:%.*]] ], [ true, [[LEAFBLOCK:%.*]] ]
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; CHECK-NEXT: br label [[FLOW5:%.*]]
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; CHECK: Flow7:
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; CHECK-NEXT: br i1 [[TMP10:%.*]], label [[INNER_LOOP_END:%.*]], label [[FLOW8:%.*]]
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; CHECK: inner.loop.end:
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; CHECK-NEXT: br label [[FLOW8]]
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; CHECK: inner.loop.body:
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; CHECK-NEXT: br i1 [[B3_INV]], label [[INNER_LOOP_BODY_ELSE:%.*]], label [[FLOW:%.*]]
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; CHECK: inner.loop.body.else:
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; CHECK-NEXT: br label [[FLOW]]
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; CHECK: Flow:
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; CHECK-NEXT: [[TMP6:%.*]] = phi i1 [ false, [[INNER_LOOP_BODY_ELSE]] ], [ true, [[INNER_LOOP_BODY]] ]
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; CHECK-NEXT: br i1 [[TMP6]], label [[INNER_LOOP_BODY_THEN:%.*]], label [[INNER_LOOP_COND:%.*]]
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; CHECK: inner.loop.body.then:
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; CHECK-NEXT: br label [[INNER_LOOP_COND]]
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; CHECK: Flow4:
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; CHECK-NEXT: [[TMP7:%.*]] = phi i1 [ [[TMP17:%.*]], [[FLOW5]] ], [ true, [[INNER_LOOP_HEADER]] ]
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; CHECK-NEXT: [[TMP8]] = phi i1 [ [[TMP18:%.*]], [[FLOW5]] ], [ [[TMP4]], [[INNER_LOOP_HEADER]] ]
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; CHECK-NEXT: [[TMP9:%.*]] = phi i1 [ [[TMP19:%.*]], [[FLOW5]] ], [ false, [[INNER_LOOP_HEADER]] ]
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; CHECK-NEXT: [[TMP10]] = phi i1 [ false, [[FLOW5]] ], [ true, [[INNER_LOOP_HEADER]] ]
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; CHECK-NEXT: br i1 [[TMP7]], label [[FLOW7:%.*]], label [[INNER_LOOP_HEADER]]
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; CHECK: inner.loop.cond:
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; CHECK-NEXT: br label [[NODEBLOCK:%.*]]
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; CHECK: NodeBlock:
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; CHECK-NEXT: [[PIVOT:%.*]] = icmp slt i32 [[X:%.*]], 1
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; CHECK-NEXT: br i1 [[PIVOT]], label [[LEAFBLOCK]], label [[FLOW5]]
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; CHECK: Flow8:
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; CHECK-NEXT: [[TMP11:%.*]] = phi i1 [ true, [[INNER_LOOP_END]] ], [ false, [[FLOW7]] ]
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; CHECK-NEXT: br i1 [[TMP9]], label [[LEAFBLOCK1:%.*]], label [[FLOW9:%.*]]
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; CHECK: LeafBlock1:
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; CHECK-NEXT: [[SWITCHLEAF2:%.*]] = icmp eq i32 [[X]], 1
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; CHECK-NEXT: br i1 [[SWITCHLEAF2]], label [[INNER_LOOP_BREAK:%.*]], label [[FLOW10:%.*]]
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; CHECK: LeafBlock:
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; CHECK-NEXT: [[SWITCHLEAF:%.*]] = icmp eq i32 [[X]], 0
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; CHECK-NEXT: br i1 [[SWITCHLEAF]], label [[INNER_LOOP_LATCH]], label [[FLOW6:%.*]]
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; CHECK: Flow9:
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; CHECK-NEXT: [[TMP12]] = phi i1 [ [[TMP14:%.*]], [[FLOW10]] ], [ [[TMP8]], [[FLOW8]] ]
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; CHECK-NEXT: [[TMP13:%.*]] = phi i1 [ [[TMP15:%.*]], [[FLOW10]] ], [ [[TMP11]], [[FLOW8]] ]
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; CHECK-NEXT: br i1 [[TMP13]], label [[OUTER_LOOP_CLEANUP:%.*]], label [[FLOW11]]
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; CHECK: inner.loop.break:
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; CHECK-NEXT: br label [[FLOW10]]
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; CHECK: Flow10:
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; CHECK-NEXT: [[TMP14]] = phi i1 [ false, [[INNER_LOOP_BREAK]] ], [ true, [[LEAFBLOCK1]] ]
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; CHECK-NEXT: [[TMP15]] = phi i1 [ true, [[INNER_LOOP_BREAK]] ], [ [[TMP11]], [[LEAFBLOCK1]] ]
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; CHECK-NEXT: br label [[FLOW9]]
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; CHECK: outer.loop.cleanup:
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; CHECK-NEXT: br label [[OUTER_LOOP_LATCH:%.*]]
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; CHECK: Flow11:
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; CHECK-NEXT: [[TMP16]] = phi i1 [ false, [[OUTER_LOOP_LATCH]] ], [ true, [[FLOW9]] ]
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; CHECK-NEXT: br label [[FLOW3]]
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; CHECK: outer.loop.latch:
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; CHECK-NEXT: br label [[FLOW11]]
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; CHECK: Flow5:
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; CHECK-NEXT: [[TMP17]] = phi i1 [ [[TMP5]], [[FLOW6]] ], [ true, [[NODEBLOCK]] ]
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; CHECK-NEXT: [[TMP18]] = phi i1 [ [[TMP5]], [[FLOW6]] ], [ [[TMP4]], [[NODEBLOCK]] ]
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; CHECK-NEXT: [[TMP19]] = phi i1 [ false, [[FLOW6]] ], [ true, [[NODEBLOCK]] ]
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; CHECK-NEXT: br label [[FLOW4]]
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; CHECK: inner.loop.latch:
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; CHECK-NEXT: br label [[FLOW6]]
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; CHECK: exit:
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; CHECK-NEXT: ret i1 [[TMP0]]
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;
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entry:
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br label %outer.loop.header
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exit.true: ; preds = %outer.loop.header
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br label %exit
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exit.false: ; preds = %inner.loop.cond
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br label %exit
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outer.loop.header: ; preds = %outer.loop.latch, %entry
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br i1 %b1, label %outer.loop.body, label %exit.true
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outer.loop.body: ; preds = %outer.loop.header
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br label %inner.loop.header
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inner.loop.header: ; preds = %inner.loop.latch, %outer.loop.body
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br i1 %b2, label %inner.loop.body, label %inner.loop.end
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inner.loop.end: ; preds = %inner.loop.header
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br label %outer.loop.cleanup
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inner.loop.body: ; preds = %inner.loop.header
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br i1 %b3, label %inner.loop.body.then, label %inner.loop.body.else
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inner.loop.body.else: ; preds = %inner.loop.body
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br label %inner.loop.cond
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inner.loop.body.then: ; preds = %inner.loop.body
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br label %inner.loop.cond
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inner.loop.cond: ; preds = %inner.loop.body.then, %inner.loop.body.else
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switch i32 %x, label %exit.false [
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i32 0, label %inner.loop.latch
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i32 1, label %inner.loop.break
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]
|
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|
||||
inner.loop.break: ; preds = %inner.loop.cond
|
||||
br label %outer.loop.cleanup
|
||||
|
||||
outer.loop.cleanup: ; preds = %inner.loop.break, %inner.loop.end
|
||||
br label %outer.loop.latch
|
||||
|
||||
outer.loop.latch: ; preds = %outer.loop.cleanup
|
||||
br label %outer.loop.header
|
||||
|
||||
inner.loop.latch: ; preds = %inner.loop.cond
|
||||
br label %inner.loop.header
|
||||
|
||||
exit: ; preds = %exit.false, %exit.true
|
||||
%r = phi i1 [ true, %exit.true ], [ false, %exit.false ]
|
||||
ret i1 %r
|
||||
}
|
||||
|
||||
; This test checks sibling loops that by default have an
|
||||
; interleaved post-order traversal.
|
||||
|
||||
define void @test_siblings(i1 %b1, i1 %b2, i1 %b3, i1 %b4, i1 %b5, i1 %b6, i1 %b7, i1 %b8, i1 %b9) {
|
||||
; CHECK-LABEL: @test_siblings(
|
||||
; CHECK-NEXT: entry:
|
||||
; CHECK-NEXT: [[B9_INV:%.*]] = xor i1 [[B9:%.*]], true
|
||||
; CHECK-NEXT: [[B6_INV:%.*]] = xor i1 [[B6:%.*]], true
|
||||
; CHECK-NEXT: [[B2_INV:%.*]] = xor i1 [[B2:%.*]], true
|
||||
; CHECK-NEXT: [[B8_INV:%.*]] = xor i1 [[B8:%.*]], true
|
||||
; CHECK-NEXT: [[B5_INV:%.*]] = xor i1 [[B5:%.*]], true
|
||||
; CHECK-NEXT: [[B3_INV:%.*]] = xor i1 [[B3:%.*]], true
|
||||
; CHECK-NEXT: [[B4_INV:%.*]] = xor i1 [[B4:%.*]], true
|
||||
; CHECK-NEXT: [[B1_INV:%.*]] = xor i1 [[B1:%.*]], true
|
||||
; CHECK-NEXT: br i1 [[B1_INV]], label [[IF_ELSE:%.*]], label [[FLOW:%.*]]
|
||||
; CHECK: if.else:
|
||||
; CHECK-NEXT: br label [[FLOW]]
|
||||
; CHECK: Flow:
|
||||
; CHECK-NEXT: [[TMP0:%.*]] = phi i1 [ [[TMP0]], [[FLOW1:%.*]] ], [ [[B2]], [[IF_ELSE]] ], [ false, [[ENTRY:%.*]] ]
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = phi i1 [ [[TMP5:%.*]], [[FLOW1]] ], [ [[B2_INV]], [[IF_ELSE]] ], [ false, [[ENTRY]] ]
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = phi i1 [ false, [[FLOW1]] ], [ false, [[IF_ELSE]] ], [ true, [[ENTRY]] ]
|
||||
; CHECK-NEXT: br i1 [[TMP2]], label [[LOOP1_HEADER:%.*]], label [[FLOW1]]
|
||||
; CHECK: loop1.header:
|
||||
; CHECK-NEXT: br i1 [[B3_INV]], label [[LOOP1_BODY:%.*]], label [[FLOW2:%.*]]
|
||||
; CHECK: Flow2:
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = phi i1 [ true, [[LOOP1_BODY]] ], [ [[TMP1]], [[LOOP1_HEADER]] ]
|
||||
; CHECK-NEXT: [[TMP4:%.*]] = phi i1 [ [[B5_INV]], [[LOOP1_BODY]] ], [ [[B3]], [[LOOP1_HEADER]] ]
|
||||
; CHECK-NEXT: br i1 [[TMP4]], label [[LOOP1_LATCH:%.*]], label [[FLOW3:%.*]]
|
||||
; CHECK: loop1.latch:
|
||||
; CHECK-NEXT: br label [[FLOW3]]
|
||||
; CHECK: Flow1:
|
||||
; CHECK-NEXT: [[TMP5]] = phi i1 [ [[TMP6:%.*]], [[FLOW3]] ], [ [[TMP1]], [[FLOW]] ]
|
||||
; CHECK-NEXT: br i1 true, label [[FLOW4:%.*]], label [[FLOW]]
|
||||
; CHECK: loop1.body:
|
||||
; CHECK-NEXT: br label [[FLOW2]]
|
||||
; CHECK: Flow3:
|
||||
; CHECK-NEXT: [[TMP6]] = phi i1 [ false, [[LOOP1_LATCH]] ], [ [[TMP3]], [[FLOW2]] ]
|
||||
; CHECK-NEXT: br label [[FLOW1]]
|
||||
; CHECK: Flow4:
|
||||
; CHECK-NEXT: [[TMP7:%.*]] = phi i1 [ false, [[FLOW5:%.*]] ], [ [[TMP5]], [[FLOW1]] ]
|
||||
; CHECK-NEXT: br i1 [[TMP7]], label [[LOOP2_HEADER:%.*]], label [[FLOW5]]
|
||||
; CHECK: loop2.header:
|
||||
; CHECK-NEXT: br i1 [[B6_INV]], label [[LOOP2_BODY:%.*]], label [[FLOW6:%.*]]
|
||||
; CHECK: Flow5:
|
||||
; CHECK-NEXT: [[TMP8:%.*]] = phi i1 [ [[TMP11:%.*]], [[FLOW7:%.*]] ], [ false, [[FLOW4]] ]
|
||||
; CHECK-NEXT: br i1 true, label [[FLOW8:%.*]], label [[FLOW4]]
|
||||
; CHECK: loop2.body:
|
||||
; CHECK-NEXT: br label [[FLOW6]]
|
||||
; CHECK: Flow6:
|
||||
; CHECK-NEXT: [[TMP9:%.*]] = phi i1 [ true, [[LOOP2_BODY]] ], [ false, [[LOOP2_HEADER]] ]
|
||||
; CHECK-NEXT: [[TMP10:%.*]] = phi i1 [ [[B7:%.*]], [[LOOP2_BODY]] ], [ [[B6]], [[LOOP2_HEADER]] ]
|
||||
; CHECK-NEXT: br i1 [[TMP10]], label [[LOOP2_LATCH:%.*]], label [[FLOW7]]
|
||||
; CHECK: loop2.latch:
|
||||
; CHECK-NEXT: br label [[FLOW7]]
|
||||
; CHECK: Flow7:
|
||||
; CHECK-NEXT: [[TMP11]] = phi i1 [ false, [[LOOP2_LATCH]] ], [ [[TMP9]], [[FLOW6]] ]
|
||||
; CHECK-NEXT: br label [[FLOW5]]
|
||||
; CHECK: Flow8:
|
||||
; CHECK-NEXT: [[TMP12:%.*]] = phi i1 [ false, [[FLOW10:%.*]] ], [ [[TMP0]], [[FLOW5]] ]
|
||||
; CHECK-NEXT: [[TMP13:%.*]] = phi i1 [ false, [[FLOW10]] ], [ [[TMP8]], [[FLOW5]] ]
|
||||
; CHECK-NEXT: br i1 [[TMP13]], label [[LOOP3_HEADER:%.*]], label [[FLOW9:%.*]]
|
||||
; CHECK: loop3.header:
|
||||
; CHECK-NEXT: br label [[FLOW9]]
|
||||
; CHECK: Flow9:
|
||||
; CHECK-NEXT: [[TMP14:%.*]] = phi i1 [ true, [[LOOP3_HEADER]] ], [ [[TMP12]], [[FLOW8]] ]
|
||||
; CHECK-NEXT: br i1 [[TMP14]], label [[LOOP3_LATCH:%.*]], label [[FLOW10]]
|
||||
; CHECK: loop3.latch:
|
||||
; CHECK-NEXT: br label [[FLOW10]]
|
||||
; CHECK: Flow10:
|
||||
; CHECK-NEXT: br i1 true, label [[EXIT:%.*]], label [[FLOW8]]
|
||||
; CHECK: exit:
|
||||
; CHECK-NEXT: ret void
|
||||
;
|
||||
entry:
|
||||
br i1 %b1, label %loop1.header, label %if.else
|
||||
|
||||
if.else:
|
||||
br i1 %b2, label %loop3.latch, label %loop2.header
|
||||
|
||||
loop1.header:
|
||||
br i1 %b3, label %loop1.latch, label %loop1.body
|
||||
|
||||
loop1.latch:
|
||||
br i1 %b4, label %loop1.header, label %exit
|
||||
|
||||
loop1.body:
|
||||
br i1 %b5, label %loop2.header, label %loop1.latch
|
||||
|
||||
loop2.header:
|
||||
br i1 %b6, label %loop2.latch, label %loop2.body
|
||||
|
||||
loop2.body:
|
||||
br i1 %b7, label %loop2.latch, label %loop3.header
|
||||
|
||||
loop2.latch:
|
||||
br i1 %b8, label %loop2.header, label %exit
|
||||
|
||||
loop3.header:
|
||||
br label %loop3.latch
|
||||
|
||||
loop3.latch:
|
||||
br i1 %b9, label %loop3.header, label %exit
|
||||
|
||||
exit:
|
||||
ret void
|
||||
}
|
||||
55
test/Transforms/StructurizeCFG/nested-loop-subregion.ll
Normal file
55
test/Transforms/StructurizeCFG/nested-loop-subregion.ll
Normal file
@ -0,0 +1,55 @@
|
||||
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
|
||||
; RUN: opt -S -structurizecfg %s -o - | FileCheck %s
|
||||
|
||||
define void @test(i1 %b1, i1 %b2, i1 %b3, i1 %b4) {
|
||||
; CHECK-LABEL: @test(
|
||||
; CHECK-NEXT: A:
|
||||
; CHECK-NEXT: [[B2_INV:%.*]] = xor i1 [[B2:%.*]], true
|
||||
; CHECK-NEXT: br i1 [[B1:%.*]], label [[B:%.*]], label [[H:%.*]]
|
||||
; CHECK: B:
|
||||
; CHECK-NEXT: br label [[C:%.*]]
|
||||
; CHECK: C:
|
||||
; CHECK-NEXT: br i1 [[B2_INV]], label [[E:%.*]], label [[FLOW:%.*]]
|
||||
; CHECK: Flow:
|
||||
; CHECK-NEXT: [[TMP0:%.*]] = phi i1 [ [[B3:%.*]], [[E]] ], [ true, [[C]] ]
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = phi i1 [ false, [[E]] ], [ true, [[C]] ]
|
||||
; CHECK-NEXT: br i1 [[TMP0]], label [[FLOW1:%.*]], label [[C]]
|
||||
; CHECK: Flow1:
|
||||
; CHECK-NEXT: br i1 [[TMP1]], label [[D:%.*]], label [[F:%.*]]
|
||||
; CHECK: D:
|
||||
; CHECK-NEXT: br label [[F]]
|
||||
; CHECK: E:
|
||||
; CHECK-NEXT: br label [[FLOW]]
|
||||
; CHECK: F:
|
||||
; CHECK-NEXT: br label [[G:%.*]]
|
||||
; CHECK: G:
|
||||
; CHECK-NEXT: br i1 [[B4:%.*]], label [[FLOW2:%.*]], label [[B]]
|
||||
; CHECK: Flow2:
|
||||
; CHECK-NEXT: br label [[H]]
|
||||
; CHECK: H:
|
||||
; CHECK-NEXT: ret void
|
||||
;
|
||||
A:
|
||||
br i1 %b1, label %B, label %H
|
||||
|
||||
B:
|
||||
br label %C
|
||||
|
||||
C:
|
||||
br i1 %b2, label %D, label %E
|
||||
|
||||
D:
|
||||
br label %F
|
||||
|
||||
E:
|
||||
br i1 %b3, label %F, label %C
|
||||
|
||||
F:
|
||||
br label %G
|
||||
|
||||
G:
|
||||
br i1 %b4, label %H, label %B
|
||||
|
||||
H:
|
||||
ret void
|
||||
}
|
||||
Loading…
Reference in New Issue
Block a user