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[X86][AVX] Only combine loads to broadcasts for legal types

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Thanks to @echristo for spotting this.

llvm-svn: 354961
This commit is contained in:
Simon Pilgrim 2019-02-27 11:17:25 +00:00
parent bc60bd01e4
commit 9e6faafbd3
3 changed files with 79 additions and 9 deletions
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20
lib/Target/X86/X86ISelLowering.cpp
View File

@ -7448,15 +7448,17 @@ static SDValue EltsFromConsecutiveLoads(EVT VT, ArrayRef<SDValue> Elts,
if (RepeatSize > ScalarSize) if (RepeatSize > ScalarSize)
RepeatVT = EVT::getVectorVT(*DAG.getContext(), RepeatVT, RepeatVT = EVT::getVectorVT(*DAG.getContext(), RepeatVT,
RepeatSize / ScalarSize); RepeatSize / ScalarSize);
if (SDValue RepeatLoad = EltsFromConsecutiveLoads( EVT BroadcastVT =
RepeatVT, RepeatedLoads, DL, DAG, Subtarget, isAfterLegalize)) { EVT::getVectorVT(*DAG.getContext(), RepeatVT.getScalarType(),
EVT BroadcastVT = VT.getSizeInBits() / ScalarSize);
EVT::getVectorVT(*DAG.getContext(), RepeatVT.getScalarType(), if (TLI.isTypeLegal(BroadcastVT)) {
VT.getSizeInBits() / ScalarSize); if (SDValue RepeatLoad = EltsFromConsecutiveLoads(
unsigned Opcode = RepeatSize > ScalarSize ? X86ISD::SUBV_BROADCAST RepeatVT, RepeatedLoads, DL, DAG, Subtarget, isAfterLegalize)) {
: X86ISD::VBROADCAST; unsigned Opcode = RepeatSize > ScalarSize ? X86ISD::SUBV_BROADCAST
SDValue Broadcast = DAG.getNode(Opcode, DL, BroadcastVT, RepeatLoad); : X86ISD::VBROADCAST;
return DAG.getBitcast(VT, Broadcast); SDValue Broadcast = DAG.getNode(Opcode, DL, BroadcastVT, RepeatLoad);
return DAG.getBitcast(VT, Broadcast);
}
} }
} }
} }

26
test/CodeGen/X86/avx-vbroadcast.ll
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@ -856,6 +856,32 @@ define <4 x double> @broadcast_shuffle1032(double* %p) {
ret <4 x double> %4 ret <4 x double> %4
} }
define void @broadcast_v16i32(i32* %a, <16 x i32>* %b) {
; X32-LABEL: broadcast_v16i32:
; X32: ## %bb.0:
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: vbroadcastss (%ecx), %ymm0
; X32-NEXT: vmovups %ymm0, 32(%eax)
; X32-NEXT: vmovups %ymm0, (%eax)
; X32-NEXT: vzeroupper
; X32-NEXT: retl
;
; X64-LABEL: broadcast_v16i32:
; X64: ## %bb.0:
; X64-NEXT: vbroadcastss (%rdi), %ymm0
; X64-NEXT: vmovups %ymm0, 32(%rsi)
; X64-NEXT: vmovups %ymm0, (%rsi)
; X64-NEXT: vzeroupper
; X64-NEXT: retq
%1 = load i32, i32* %a, align 4
%2 = insertelement <8 x i32> undef, i32 %1, i32 0
%3 = shufflevector <8 x i32> %2, <8 x i32> undef, <8 x i32> zeroinitializer
%4 = shufflevector <8 x i32> undef, <8 x i32> %3, <16 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11, i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
store <16 x i32> %4, <16 x i32>* %b, align 4
ret void
}
; ;
; When VBROADCAST replaces an existing load, ensure it still respects lifetime dependencies. ; When VBROADCAST replaces an existing load, ensure it still respects lifetime dependencies.
; ;

42
test/CodeGen/X86/avx2-vbroadcast.ll
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@ -1037,6 +1037,48 @@ define <4 x double> @splat_concat4(double %d) {
ret <4 x double> %5 ret <4 x double> %5
} }
define void @broadcast_v16i32(i32* %a, <16 x i32>* %b) {
; X32-AVX2-LABEL: broadcast_v16i32:
; X32-AVX2: ## %bb.0:
; X32-AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-AVX2-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-AVX2-NEXT: vbroadcastss (%ecx), %ymm0
; X32-AVX2-NEXT: vmovups %ymm0, 32(%eax)
; X32-AVX2-NEXT: vmovups %ymm0, (%eax)
; X32-AVX2-NEXT: vzeroupper
; X32-AVX2-NEXT: retl
;
; X64-AVX2-LABEL: broadcast_v16i32:
; X64-AVX2: ## %bb.0:
; X64-AVX2-NEXT: vbroadcastss (%rdi), %ymm0
; X64-AVX2-NEXT: vmovups %ymm0, 32(%rsi)
; X64-AVX2-NEXT: vmovups %ymm0, (%rsi)
; X64-AVX2-NEXT: vzeroupper
; X64-AVX2-NEXT: retq
;
; X32-AVX512VL-LABEL: broadcast_v16i32:
; X32-AVX512VL: ## %bb.0:
; X32-AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-AVX512VL-NEXT: vbroadcastss (%ecx), %zmm0
; X32-AVX512VL-NEXT: vmovups %zmm0, (%eax)
; X32-AVX512VL-NEXT: vzeroupper
; X32-AVX512VL-NEXT: retl
;
; X64-AVX512VL-LABEL: broadcast_v16i32:
; X64-AVX512VL: ## %bb.0:
; X64-AVX512VL-NEXT: vbroadcastss (%rdi), %zmm0
; X64-AVX512VL-NEXT: vmovups %zmm0, (%rsi)
; X64-AVX512VL-NEXT: vzeroupper
; X64-AVX512VL-NEXT: retq
%1 = load i32, i32* %a, align 4
%2 = insertelement <8 x i32> undef, i32 %1, i32 0
%3 = shufflevector <8 x i32> %2, <8 x i32> undef, <8 x i32> zeroinitializer
%4 = shufflevector <8 x i32> undef, <8 x i32> %3, <16 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11, i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
store <16 x i32> %4, <16 x i32>* %b, align 4
ret void
}
; Test cases for <rdar://problem/16074331>. ; Test cases for <rdar://problem/16074331>.
; Instruction selection for broacast instruction fails if ; Instruction selection for broacast instruction fails if
; the load cannot be folded into the broadcast. ; the load cannot be folded into the broadcast.