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NFC: Regenerating x86-sse41.ll test for InstCombine
Test regenerated to reduce noise in further patches. llvm-svn: 334806
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@ -4,7 +4,7 @@ target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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define <2 x double> @test_round_sd(<2 x double> %a, <2 x double> %b) {
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; CHECK-LABEL: @test_round_sd(
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; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x double> @llvm.x86.sse41.round.sd(<2 x double> %a, <2 x double> %b, i32 10)
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; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x double> @llvm.x86.sse41.round.sd(<2 x double> [[A:%.*]], <2 x double> [[B:%.*]], i32 10)
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; CHECK-NEXT: ret <2 x double> [[TMP1]]
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;
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%1 = insertelement <2 x double> %a, double 1.000000e+00, i32 0
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@ -15,7 +15,7 @@ define <2 x double> @test_round_sd(<2 x double> %a, <2 x double> %b) {
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define double @test_round_sd_0(double %a, double %b) {
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; CHECK-LABEL: @test_round_sd_0(
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; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> undef, double %b, i32 0
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; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> undef, double [[B:%.*]], i32 0
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; CHECK-NEXT: [[TMP2:%.*]] = tail call <2 x double> @llvm.x86.sse41.round.sd(<2 x double> undef, <2 x double> [[TMP1]], i32 10)
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; CHECK-NEXT: [[TMP3:%.*]] = extractelement <2 x double> [[TMP2]], i32 0
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; CHECK-NEXT: ret double [[TMP3]]
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@ -44,7 +44,7 @@ define double @test_round_sd_1(double %a, double %b) {
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define <4 x float> @test_round_ss(<4 x float> %a, <4 x float> %b) {
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; CHECK-LABEL: @test_round_ss(
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; CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x float> @llvm.x86.sse41.round.ss(<4 x float> <float undef, float 1.000000e+00, float 2.000000e+00, float 3.000000e+00>, <4 x float> %b, i32 10)
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; CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x float> @llvm.x86.sse41.round.ss(<4 x float> <float undef, float 1.000000e+00, float 2.000000e+00, float 3.000000e+00>, <4 x float> [[B:%.*]], i32 10)
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; CHECK-NEXT: ret <4 x float> [[TMP1]]
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;
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%1 = insertelement <4 x float> %a, float 1.000000e+00, i32 1
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@ -59,7 +59,7 @@ define <4 x float> @test_round_ss(<4 x float> %a, <4 x float> %b) {
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define float @test_round_ss_0(float %a, float %b) {
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; CHECK-LABEL: @test_round_ss_0(
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; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> undef, float %b, i32 0
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; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> undef, float [[B:%.*]], i32 0
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; CHECK-NEXT: [[TMP2:%.*]] = tail call <4 x float> @llvm.x86.sse41.round.ss(<4 x float> undef, <4 x float> [[TMP1]], i32 10)
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; CHECK-NEXT: [[R:%.*]] = extractelement <4 x float> [[TMP2]], i32 0
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; CHECK-NEXT: ret float [[R]]
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