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For Mips16, start to consolidate all forms of 32 bit literal loading so that

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they can be better handled and optimized in the Mips16 constant island code.

llvm-svn: 192520
This commit is contained in:
Reed Kotler 2013-10-12 02:19:08 +00:00
parent 2703980be5
commit 9efb450361
2 changed files with 14 additions and 9 deletions
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4
lib/Target/Mips/Mips16InstrInfo.td
View File

@ -1355,9 +1355,7 @@ def: Mips16Pat<(i32 addr16:$addr),
// Large (>16 bit) immediate loads
def : Mips16Pat<(i32 imm:$imm),
(OrRxRxRy16 (SllX16 (LiRxImmX16 (HI16 imm:$imm)), 16),
(LiRxImmX16 (LO16 imm:$imm)))>;
def : Mips16Pat<(i32 imm:$imm), (LwConstant32 imm:$imm)>;
// Carry MipsPatterns
def : Mips16Pat<(subc CPU16Regs:$lhs, CPU16Regs:$rhs),

19
test/CodeGen/Mips/i32k.ll
View File

@ -1,16 +1,23 @@
; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16a
; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16b
; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16
@.str = private unnamed_addr constant [4 x i8] c"%i\0A\00", align 1
define i32 @main() nounwind {
entry:
%call = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([4 x i8]* @.str, i32 0, i32 0), i32 1075344593) nounwind
; 16a: li ${{[0-9]+}}, 29905
; 16b: li ${{[0-9]+}}, 16408
; 16: lw ${{[0-9]+}}, 1f
; 16: b 2f
; 16: .align 2
; 16: 1: .word 1075344593
; 16: 2:
%call1 = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([4 x i8]* @.str, i32 0, i32 0), i32 -1075344593) nounwind
; 16a: li ${{[0-9]+}}, 49127
; 16b: li ${{[0-9]+}}, 35631
; 16: lw ${{[0-9]+}}, 1f
; 16: b 2f
; 16: .align 2
; 16: 1: .word -1075344593
; 16: 2:
ret i32 0
}