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[PowerPC] Generate CFI directives when probing in prologue
Add missing CFI directives when probing in prologue if `stack-clash-protection` is enabled. Differential Revision: https://reviews.llvm.org/D83276
This commit is contained in:
Kai Luo
parent
fb679b5e37
commit
9f42c54bb4
@ -1371,6 +1371,10 @@ void PPCFrameLowering::inlineStackProbe(MachineFunction &MF,
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const PPCTargetLowering &TLI = *Subtarget.getTargetLowering();
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const PPCInstrInfo &TII = *Subtarget.getInstrInfo();
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MachineFrameInfo &MFI = MF.getFrameInfo();
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MachineModuleInfo &MMI = MF.getMMI();
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const MCRegisterInfo *MRI = MMI.getContext().getRegisterInfo();
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// AIX assembler does not support cfi directives.
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const bool needsCFI = MF.needsFrameMoves() && !Subtarget.isAIXABI();
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auto StackAllocMIPos = llvm::find_if(PrologMBB, [](MachineInstr &MI) {
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int Opc = MI.getOpcode();
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return Opc == PPC::PROBED_STACKALLOC_64 || Opc == PPC::PROBED_STACKALLOC_32;
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@ -1394,6 +1398,24 @@ void PPCFrameLowering::inlineStackProbe(MachineFunction &MF,
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// Initialize current frame pointer.
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const MCInstrDesc &CopyInst = TII.get(isPPC64 ? PPC::OR8 : PPC::OR);
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BuildMI(PrologMBB, {MI}, DL, CopyInst, FPReg).addReg(SPReg).addReg(SPReg);
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// Subroutines to generate .cfi_* directives.
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auto buildDefCFAReg = [&](MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MBBI, Register Reg) {
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unsigned RegNum = MRI->getDwarfRegNum(Reg, true);
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unsigned CFIIndex = MF.addFrameInst(
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MCCFIInstruction::createDefCfaRegister(nullptr, RegNum));
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BuildMI(MBB, MBBI, DL, TII.get(TargetOpcode::CFI_INSTRUCTION))
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.addCFIIndex(CFIIndex);
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};
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auto buildDefCFA = [&](MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MBBI, Register Reg,
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int Offset) {
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unsigned RegNum = MRI->getDwarfRegNum(Reg, true);
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unsigned CFIIndex = MBB.getParent()->addFrameInst(
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MCCFIInstruction::cfiDefCfa(nullptr, RegNum, Offset));
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BuildMI(MBB, MBBI, DL, TII.get(TargetOpcode::CFI_INSTRUCTION))
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.addCFIIndex(CFIIndex);
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};
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// Subroutine to determine if we can use the Imm as part of d-form.
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auto CanUseDForm = [](int64_t Imm) { return isInt<16>(Imm) && Imm % 4 == 0; };
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// Subroutine to materialize the Imm into TempReg.
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@ -1427,6 +1449,9 @@ void PPCFrameLowering::inlineStackProbe(MachineFunction &MF,
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.addReg(SPReg)
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.addReg(NegSizeReg);
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};
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// Use FPReg to calculate CFA.
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if (needsCFI)
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buildDefCFA(PrologMBB, {MI}, FPReg, 0);
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// For case HasBP && MaxAlign > 1, we have to align the SP by performing
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// SP = SP - SP % MaxAlign.
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if (HasBP && MaxAlign > 1) {
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@ -1462,6 +1487,10 @@ void PPCFrameLowering::inlineStackProbe(MachineFunction &MF,
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MaterializeImm(PrologMBB, {MI}, NegProbeSize, ScratchReg);
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for (int i = 0; i < NumBlocks; ++i)
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allocateAndProbe(PrologMBB, {MI}, NegProbeSize, ScratchReg, UseDForm);
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if (needsCFI) {
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// Restore using SPReg to calculate CFA.
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buildDefCFAReg(PrologMBB, {MI}, SPReg);
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}
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} else {
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// Since CTR is a volatile register and current shrinkwrap implementation
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// won't choose an MBB in a loop as the PrologMBB, it's safe to synthesize a
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@ -1492,6 +1521,10 @@ void PPCFrameLowering::inlineStackProbe(MachineFunction &MF,
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PrologMBB.end());
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ExitMBB->transferSuccessorsAndUpdatePHIs(&PrologMBB);
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PrologMBB.addSuccessor(LoopMBB);
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if (needsCFI) {
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// Restore using SPReg to calculate CFA.
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buildDefCFAReg(*ExitMBB, ExitMBB->begin(), SPReg);
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}
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// Update liveins.
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recomputeLiveIns(*LoopMBB);
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recomputeLiveIns(*ExitMBB);
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@ -45,6 +45,7 @@ define i8 @f1() #0 "stack-probe-size"="0" {
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; CHECK-LE-LABEL: f1:
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; CHECK-LE: # %bb.0: # %entry
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; CHECK-LE-NEXT: mr r12, r1
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; CHECK-LE-NEXT: .cfi_def_cfa r12, 0
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; CHECK-LE-NEXT: li r0, 259
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; CHECK-LE-NEXT: mtctr r0
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; CHECK-LE-NEXT: .LBB1_1: # %entry
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@ -52,6 +53,7 @@ define i8 @f1() #0 "stack-probe-size"="0" {
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; CHECK-LE-NEXT: stdu r12, -16(r1)
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; CHECK-LE-NEXT: bdnz .LBB1_1
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; CHECK-LE-NEXT: # %bb.2: # %entry
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; CHECK-LE-NEXT: .cfi_def_cfa_register r1
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; CHECK-LE-NEXT: .cfi_def_cfa_offset 4144
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; CHECK-LE-NEXT: li r3, 3
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; CHECK-LE-NEXT: stb r3, 48(r1)
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@ -62,6 +64,7 @@ define i8 @f1() #0 "stack-probe-size"="0" {
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; CHECK-BE-LABEL: f1:
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; CHECK-BE: # %bb.0: # %entry
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; CHECK-BE-NEXT: mr r12, r1
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; CHECK-BE-NEXT: .cfi_def_cfa r12, 0
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; CHECK-BE-NEXT: li r0, 260
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; CHECK-BE-NEXT: mtctr r0
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; CHECK-BE-NEXT: .LBB1_1: # %entry
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@ -69,6 +72,7 @@ define i8 @f1() #0 "stack-probe-size"="0" {
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; CHECK-BE-NEXT: stdu r12, -16(r1)
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; CHECK-BE-NEXT: bdnz .LBB1_1
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; CHECK-BE-NEXT: # %bb.2: # %entry
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; CHECK-BE-NEXT: .cfi_def_cfa_register r1
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; CHECK-BE-NEXT: .cfi_def_cfa_offset 4160
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; CHECK-BE-NEXT: li r3, 3
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; CHECK-BE-NEXT: stb r3, 64(r1)
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@ -79,6 +83,7 @@ define i8 @f1() #0 "stack-probe-size"="0" {
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; CHECK-32-LABEL: f1:
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; CHECK-32: # %bb.0: # %entry
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; CHECK-32-NEXT: mr r12, r1
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; CHECK-32-NEXT: .cfi_def_cfa r12, 0
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; CHECK-32-NEXT: li r0, 257
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; CHECK-32-NEXT: mtctr r0
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; CHECK-32-NEXT: .LBB1_1: # %entry
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@ -86,6 +91,7 @@ define i8 @f1() #0 "stack-probe-size"="0" {
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; CHECK-32-NEXT: stwu r12, -16(r1)
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; CHECK-32-NEXT: bdnz .LBB1_1
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; CHECK-32-NEXT: # %bb.2: # %entry
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; CHECK-32-NEXT: .cfi_def_cfa_register r1
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; CHECK-32-NEXT: sub r0, r1, r12
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; CHECK-32-NEXT: sub r0, r1, r0
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; CHECK-32-NEXT: .cfi_def_cfa_offset 4112
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@ -106,6 +112,7 @@ define i8 @f2() #0 {
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; CHECK-LE-LABEL: f2:
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; CHECK-LE: # %bb.0: # %entry
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; CHECK-LE-NEXT: mr r12, r1
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; CHECK-LE-NEXT: .cfi_def_cfa r12, 0
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; CHECK-LE-NEXT: stdu r12, -48(r1)
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; CHECK-LE-NEXT: li r0, 16
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; CHECK-LE-NEXT: mtctr r0
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@ -114,6 +121,7 @@ define i8 @f2() #0 {
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; CHECK-LE-NEXT: stdu r12, -4096(r1)
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; CHECK-LE-NEXT: bdnz .LBB2_1
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; CHECK-LE-NEXT: # %bb.2: # %entry
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; CHECK-LE-NEXT: .cfi_def_cfa_register r1
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; CHECK-LE-NEXT: .cfi_def_cfa_offset 65584
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; CHECK-LE-NEXT: li r3, 3
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; CHECK-LE-NEXT: stb r3, 48(r1)
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@ -124,6 +132,7 @@ define i8 @f2() #0 {
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; CHECK-BE-LABEL: f2:
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; CHECK-BE: # %bb.0: # %entry
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; CHECK-BE-NEXT: mr r12, r1
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; CHECK-BE-NEXT: .cfi_def_cfa r12, 0
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; CHECK-BE-NEXT: stdu r12, -64(r1)
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; CHECK-BE-NEXT: li r0, 16
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; CHECK-BE-NEXT: mtctr r0
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@ -132,6 +141,7 @@ define i8 @f2() #0 {
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; CHECK-BE-NEXT: stdu r12, -4096(r1)
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; CHECK-BE-NEXT: bdnz .LBB2_1
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; CHECK-BE-NEXT: # %bb.2: # %entry
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; CHECK-BE-NEXT: .cfi_def_cfa_register r1
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; CHECK-BE-NEXT: .cfi_def_cfa_offset 65600
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; CHECK-BE-NEXT: li r3, 3
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; CHECK-BE-NEXT: stb r3, 64(r1)
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@ -142,6 +152,7 @@ define i8 @f2() #0 {
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; CHECK-32-LABEL: f2:
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; CHECK-32: # %bb.0: # %entry
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; CHECK-32-NEXT: mr r12, r1
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; CHECK-32-NEXT: .cfi_def_cfa r12, 0
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; CHECK-32-NEXT: stwu r12, -16(r1)
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; CHECK-32-NEXT: li r0, 16
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; CHECK-32-NEXT: mtctr r0
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@ -150,6 +161,7 @@ define i8 @f2() #0 {
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; CHECK-32-NEXT: stwu r12, -4096(r1)
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; CHECK-32-NEXT: bdnz .LBB2_1
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; CHECK-32-NEXT: # %bb.2: # %entry
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; CHECK-32-NEXT: .cfi_def_cfa_register r1
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; CHECK-32-NEXT: sub r0, r1, r12
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; CHECK-32-NEXT: sub r0, r1, r0
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; CHECK-32-NEXT: .cfi_def_cfa_offset 65552
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@ -173,9 +185,11 @@ define i8 @f3() #0 "stack-probe-size"="32768" {
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; CHECK-LE-LABEL: f3:
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; CHECK-LE: # %bb.0: # %entry
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; CHECK-LE-NEXT: mr r12, r1
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; CHECK-LE-NEXT: .cfi_def_cfa r12, 0
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; CHECK-LE-NEXT: stdu r12, -48(r1)
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; CHECK-LE-NEXT: stdu r12, -32768(r1)
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; CHECK-LE-NEXT: stdu r12, -32768(r1)
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; CHECK-LE-NEXT: .cfi_def_cfa_register r1
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; CHECK-LE-NEXT: .cfi_def_cfa_offset 65584
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; CHECK-LE-NEXT: li r3, 3
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; CHECK-LE-NEXT: stb r3, 48(r1)
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@ -186,9 +200,11 @@ define i8 @f3() #0 "stack-probe-size"="32768" {
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; CHECK-BE-LABEL: f3:
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; CHECK-BE: # %bb.0: # %entry
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; CHECK-BE-NEXT: mr r12, r1
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; CHECK-BE-NEXT: .cfi_def_cfa r12, 0
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; CHECK-BE-NEXT: stdu r12, -64(r1)
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; CHECK-BE-NEXT: stdu r12, -32768(r1)
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; CHECK-BE-NEXT: stdu r12, -32768(r1)
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; CHECK-BE-NEXT: .cfi_def_cfa_register r1
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; CHECK-BE-NEXT: .cfi_def_cfa_offset 65600
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; CHECK-BE-NEXT: li r3, 3
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; CHECK-BE-NEXT: stb r3, 64(r1)
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@ -199,9 +215,11 @@ define i8 @f3() #0 "stack-probe-size"="32768" {
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; CHECK-32-LABEL: f3:
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; CHECK-32: # %bb.0: # %entry
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; CHECK-32-NEXT: mr r12, r1
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; CHECK-32-NEXT: .cfi_def_cfa r12, 0
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; CHECK-32-NEXT: stwu r12, -16(r1)
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; CHECK-32-NEXT: stwu r12, -32768(r1)
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; CHECK-32-NEXT: stwu r12, -32768(r1)
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; CHECK-32-NEXT: .cfi_def_cfa_register r1
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; CHECK-32-NEXT: sub r0, r1, r12
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; CHECK-32-NEXT: sub r0, r1, r0
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; CHECK-32-NEXT: .cfi_def_cfa_offset 65552
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@ -274,6 +292,7 @@ define i8 @f5() #0 "stack-probe-size"="65536" {
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; CHECK-LE-LABEL: f5:
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; CHECK-LE: # %bb.0: # %entry
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; CHECK-LE-NEXT: mr r12, r1
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; CHECK-LE-NEXT: .cfi_def_cfa r12, 0
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; CHECK-LE-NEXT: stdu r12, -48(r1)
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; CHECK-LE-NEXT: li r0, 16
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; CHECK-LE-NEXT: mtctr r0
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@ -284,6 +303,7 @@ define i8 @f5() #0 "stack-probe-size"="65536" {
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; CHECK-LE-NEXT: stdux r12, r1, r0
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; CHECK-LE-NEXT: bdnz .LBB5_1
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; CHECK-LE-NEXT: # %bb.2: # %entry
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; CHECK-LE-NEXT: .cfi_def_cfa_register r1
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; CHECK-LE-NEXT: .cfi_def_cfa_offset 1048624
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; CHECK-LE-NEXT: li r3, 3
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; CHECK-LE-NEXT: stb r3, 48(r1)
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@ -294,6 +314,7 @@ define i8 @f5() #0 "stack-probe-size"="65536" {
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; CHECK-BE-LABEL: f5:
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; CHECK-BE: # %bb.0: # %entry
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; CHECK-BE-NEXT: mr r12, r1
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; CHECK-BE-NEXT: .cfi_def_cfa r12, 0
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; CHECK-BE-NEXT: stdu r12, -64(r1)
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; CHECK-BE-NEXT: li r0, 16
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; CHECK-BE-NEXT: mtctr r0
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@ -304,6 +325,7 @@ define i8 @f5() #0 "stack-probe-size"="65536" {
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; CHECK-BE-NEXT: stdux r12, r1, r0
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; CHECK-BE-NEXT: bdnz .LBB5_1
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; CHECK-BE-NEXT: # %bb.2: # %entry
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; CHECK-BE-NEXT: .cfi_def_cfa_register r1
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; CHECK-BE-NEXT: .cfi_def_cfa_offset 1048640
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; CHECK-BE-NEXT: li r3, 3
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; CHECK-BE-NEXT: stb r3, 64(r1)
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@ -314,6 +336,7 @@ define i8 @f5() #0 "stack-probe-size"="65536" {
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; CHECK-32-LABEL: f5:
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; CHECK-32: # %bb.0: # %entry
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; CHECK-32-NEXT: mr r12, r1
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; CHECK-32-NEXT: .cfi_def_cfa r12, 0
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; CHECK-32-NEXT: stwu r12, -16(r1)
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; CHECK-32-NEXT: li r0, 16
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; CHECK-32-NEXT: mtctr r0
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@ -324,6 +347,7 @@ define i8 @f5() #0 "stack-probe-size"="65536" {
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; CHECK-32-NEXT: stwux r12, r1, r0
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; CHECK-32-NEXT: bdnz .LBB5_1
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; CHECK-32-NEXT: # %bb.2: # %entry
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; CHECK-32-NEXT: .cfi_def_cfa_register r1
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; CHECK-32-NEXT: sub r0, r1, r12
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; CHECK-32-NEXT: sub r0, r1, r0
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; CHECK-32-NEXT: .cfi_def_cfa_offset 1048592
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@ -347,6 +371,7 @@ define i8 @f6() #0 {
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; CHECK-LE-LABEL: f6:
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; CHECK-LE: # %bb.0: # %entry
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; CHECK-LE-NEXT: mr r12, r1
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; CHECK-LE-NEXT: .cfi_def_cfa r12, 0
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; CHECK-LE-NEXT: stdu r12, -48(r1)
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; CHECK-LE-NEXT: lis r0, 4
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; CHECK-LE-NEXT: nop
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@ -356,6 +381,7 @@ define i8 @f6() #0 {
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; CHECK-LE-NEXT: stdu r12, -4096(r1)
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; CHECK-LE-NEXT: bdnz .LBB6_1
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; CHECK-LE-NEXT: # %bb.2: # %entry
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; CHECK-LE-NEXT: .cfi_def_cfa_register r1
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; CHECK-LE-NEXT: .cfi_def_cfa_offset 1073741872
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; CHECK-LE-NEXT: li r3, 3
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; CHECK-LE-NEXT: stb r3, 48(r1)
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@ -366,6 +392,7 @@ define i8 @f6() #0 {
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; CHECK-BE-LABEL: f6:
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; CHECK-BE: # %bb.0: # %entry
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; CHECK-BE-NEXT: mr r12, r1
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; CHECK-BE-NEXT: .cfi_def_cfa r12, 0
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; CHECK-BE-NEXT: stdu r12, -64(r1)
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; CHECK-BE-NEXT: lis r0, 4
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; CHECK-BE-NEXT: nop
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@ -375,6 +402,7 @@ define i8 @f6() #0 {
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; CHECK-BE-NEXT: stdu r12, -4096(r1)
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; CHECK-BE-NEXT: bdnz .LBB6_1
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; CHECK-BE-NEXT: # %bb.2: # %entry
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; CHECK-BE-NEXT: .cfi_def_cfa_register r1
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; CHECK-BE-NEXT: .cfi_def_cfa_offset 1073741888
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; CHECK-BE-NEXT: li r3, 3
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; CHECK-BE-NEXT: stb r3, 64(r1)
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@ -385,6 +413,7 @@ define i8 @f6() #0 {
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; CHECK-32-LABEL: f6:
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; CHECK-32: # %bb.0: # %entry
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; CHECK-32-NEXT: mr r12, r1
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; CHECK-32-NEXT: .cfi_def_cfa r12, 0
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; CHECK-32-NEXT: stwu r12, -16(r1)
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; CHECK-32-NEXT: lis r0, 4
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; CHECK-32-NEXT: nop
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@ -394,6 +423,7 @@ define i8 @f6() #0 {
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; CHECK-32-NEXT: stwu r12, -4096(r1)
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; CHECK-32-NEXT: bdnz .LBB6_1
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; CHECK-32-NEXT: # %bb.2: # %entry
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; CHECK-32-NEXT: .cfi_def_cfa_register r1
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; CHECK-32-NEXT: sub r0, r1, r12
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; CHECK-32-NEXT: sub r0, r1, r0
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; CHECK-32-NEXT: .cfi_def_cfa_offset 1073741840
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@ -416,8 +446,9 @@ entry:
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define i8 @f7() #0 "stack-probe-size"="65536" {
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; CHECK-LE-LABEL: f7:
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; CHECK-LE: # %bb.0: # %entry
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; CHECK-LE-NEXT: lis r0, -1
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; CHECK-LE-NEXT: mr r12, r1
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; CHECK-LE-NEXT: .cfi_def_cfa r12, 0
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; CHECK-LE-NEXT: lis r0, -1
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; CHECK-LE-NEXT: ori r0, r0, 13776
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; CHECK-LE-NEXT: stdux r12, r1, r0
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; CHECK-LE-NEXT: li r0, 15258
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@ -429,6 +460,7 @@ define i8 @f7() #0 "stack-probe-size"="65536" {
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; CHECK-LE-NEXT: stdux r12, r1, r0
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; CHECK-LE-NEXT: bdnz .LBB7_1
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; CHECK-LE-NEXT: # %bb.2: # %entry
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; CHECK-LE-NEXT: .cfi_def_cfa_register r1
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; CHECK-LE-NEXT: .cfi_def_cfa_offset 1000000048
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; CHECK-LE-NEXT: li r3, 3
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; CHECK-LE-NEXT: stb r3, 41(r1)
|
||||
@ -438,8 +470,9 @@ define i8 @f7() #0 "stack-probe-size"="65536" {
|
||||
;
|
||||
; CHECK-BE-LABEL: f7:
|
||||
; CHECK-BE: # %bb.0: # %entry
|
||||
; CHECK-BE-NEXT: lis r0, -1
|
||||
; CHECK-BE-NEXT: mr r12, r1
|
||||
; CHECK-BE-NEXT: .cfi_def_cfa r12, 0
|
||||
; CHECK-BE-NEXT: lis r0, -1
|
||||
; CHECK-BE-NEXT: ori r0, r0, 13760
|
||||
; CHECK-BE-NEXT: stdux r12, r1, r0
|
||||
; CHECK-BE-NEXT: li r0, 15258
|
||||
@ -451,6 +484,7 @@ define i8 @f7() #0 "stack-probe-size"="65536" {
|
||||
; CHECK-BE-NEXT: stdux r12, r1, r0
|
||||
; CHECK-BE-NEXT: bdnz .LBB7_1
|
||||
; CHECK-BE-NEXT: # %bb.2: # %entry
|
||||
; CHECK-BE-NEXT: .cfi_def_cfa_register r1
|
||||
; CHECK-BE-NEXT: .cfi_def_cfa_offset 1000000064
|
||||
; CHECK-BE-NEXT: li r3, 3
|
||||
; CHECK-BE-NEXT: stb r3, 57(r1)
|
||||
@ -460,8 +494,9 @@ define i8 @f7() #0 "stack-probe-size"="65536" {
|
||||
;
|
||||
; CHECK-32-LABEL: f7:
|
||||
; CHECK-32: # %bb.0: # %entry
|
||||
; CHECK-32-NEXT: lis r0, -1
|
||||
; CHECK-32-NEXT: mr r12, r1
|
||||
; CHECK-32-NEXT: .cfi_def_cfa r12, 0
|
||||
; CHECK-32-NEXT: lis r0, -1
|
||||
; CHECK-32-NEXT: ori r0, r0, 13808
|
||||
; CHECK-32-NEXT: stwux r12, r1, r0
|
||||
; CHECK-32-NEXT: li r0, 15258
|
||||
@ -473,6 +508,7 @@ define i8 @f7() #0 "stack-probe-size"="65536" {
|
||||
; CHECK-32-NEXT: stwux r12, r1, r0
|
||||
; CHECK-32-NEXT: bdnz .LBB7_1
|
||||
; CHECK-32-NEXT: # %bb.2: # %entry
|
||||
; CHECK-32-NEXT: .cfi_def_cfa_register r1
|
||||
; CHECK-32-NEXT: sub r0, r1, r12
|
||||
; CHECK-32-NEXT: sub r0, r1, r0
|
||||
; CHECK-32-NEXT: .cfi_def_cfa_offset 1000000016
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user