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R600/structurizer: improve loop handling
Generate more than one loop if it seems to make sense. This is a candidate for the stable branch. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Tom Stellard <thomas.stellard@amd.com> llvm-svn: 175348
This commit is contained in:
Christian Konig
parent
1ff84ee8af
commit
9f722d7ef3
@ -43,6 +43,7 @@ typedef DenseMap<DomTreeNode *, unsigned> DTN2UnsignedMap;
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typedef DenseMap<BasicBlock *, PhiMap> BBPhiMap;
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typedef DenseMap<BasicBlock *, Value *> BBPredicates;
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typedef DenseMap<BasicBlock *, BBPredicates> PredMap;
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typedef DenseMap<BasicBlock *, BasicBlock*> BB2BBMap;
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typedef DenseMap<BasicBlock *, BBVector> BB2BBVecMap;
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// The name for newly created blocks.
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@ -175,29 +176,30 @@ class AMDGPUStructurizeCFG : public RegionPass {
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RNVector Order;
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BBSet Visited;
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PredMap Predicates;
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BBPhiMap DeletedPhis;
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BB2BBVecMap AddedPhis;
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PredMap Predicates;
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BranchVector Conditions;
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BasicBlock *LoopStart;
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BasicBlock *LoopEnd;
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BBSet LoopTargets;
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BBPredicates LoopPred;
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BB2BBMap Loops;
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PredMap LoopPreds;
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BranchVector LoopConds;
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RegionNode *PrevNode;
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void orderNodes();
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void analyzeLoops(RegionNode *N);
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Value *buildCondition(BranchInst *Term, unsigned Idx, bool Invert);
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bool analyzeLoopStart(BasicBlock *From, BasicBlock *To, Value *Condition);
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void analyzeNode(RegionNode *N);
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void analyzeLoopEnd(RegionNode *N);
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void gatherPredicates(RegionNode *N);
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void collectInfos();
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void insertConditions();
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void insertConditions(bool Loops);
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void delPhiValues(BasicBlock *From, BasicBlock *To);
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@ -212,17 +214,19 @@ class AMDGPUStructurizeCFG : public RegionPass {
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BasicBlock *getNextFlow(BasicBlock *Dominator);
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BasicBlock *needPrefix(RegionNode *&Prev, RegionNode *Node);
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BasicBlock *needPrefix(bool NeedEmpty);
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BasicBlock *needPostfix(BasicBlock *Flow, bool ExitUseAllowed);
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RegionNode *getNextPrev(BasicBlock *Next);
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void setPrevNode(BasicBlock *BB);
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bool dominatesPredicates(BasicBlock *BB, RegionNode *Node);
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bool isPredictableTrue(RegionNode *Who, RegionNode *Where);
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bool isPredictableTrue(RegionNode *Node);
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RegionNode *wireFlow(RegionNode *&Prev, bool ExitUseAllowed);
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void wireFlow(bool ExitUseAllowed, BasicBlock *LoopEnd);
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void handleLoops(bool ExitUseAllowed, BasicBlock *LoopEnd);
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void createFlow();
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@ -278,6 +282,29 @@ void AMDGPUStructurizeCFG::orderNodes() {
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}
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}
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/// \brief Determine the end of the loops
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void AMDGPUStructurizeCFG::analyzeLoops(RegionNode *N) {
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if (N->isSubRegion()) {
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// Test for exit as back edge
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BasicBlock *Exit = N->getNodeAs<Region>()->getExit();
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if (Visited.count(Exit))
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Loops[Exit] = N->getEntry();
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} else {
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// Test for sucessors as back edge
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BasicBlock *BB = N->getNodeAs<BasicBlock>();
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BranchInst *Term = cast<BranchInst>(BB->getTerminator());
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for (unsigned i = 0, e = Term->getNumSuccessors(); i != e; ++i) {
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BasicBlock *Succ = Term->getSuccessor(i);
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if (Visited.count(Succ))
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Loops[Succ] = BB;
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}
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}
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}
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/// \brief Build the condition for one edge
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Value *AMDGPUStructurizeCFG::buildCondition(BranchInst *Term, unsigned Idx,
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bool Invert) {
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@ -291,54 +318,20 @@ Value *AMDGPUStructurizeCFG::buildCondition(BranchInst *Term, unsigned Idx,
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return Cond;
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}
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/// \brief Analyze the start of a loop and insert predicates as necessary
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bool AMDGPUStructurizeCFG::analyzeLoopStart(BasicBlock *From, BasicBlock *To,
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Value *Condition) {
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LoopPred[From] = Condition;
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LoopTargets.insert(To);
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if (!LoopStart) {
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LoopStart = To;
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return true;
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} else if (LoopStart == To)
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return true;
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// We need to handle the case of intersecting loops, e. g.
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//
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// /----<-----
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// | |
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// -> A -> B -> C -> D
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// | |
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// -----<----/
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RNVector::reverse_iterator OI = Order.rbegin(), OE = Order.rend();
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for (;OI != OE; ++OI)
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if ((*OI)->getEntry() == LoopStart)
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break;
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for (;OI != OE && (*OI)->getEntry() != To; ++OI) {
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BBPredicates &Pred = Predicates[(*OI)->getEntry()];
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if (!Pred.count(From))
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Pred[From] = Condition;
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}
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return false;
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}
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/// \brief Analyze the predecessors of each block and build up predicates
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void AMDGPUStructurizeCFG::analyzeNode(RegionNode *N) {
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void AMDGPUStructurizeCFG::gatherPredicates(RegionNode *N) {
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RegionInfo *RI = ParentRegion->getRegionInfo();
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BasicBlock *BB = N->getEntry();
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BBPredicates &Pred = Predicates[BB];
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BBPredicates &LPred = LoopPreds[BB];
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for (pred_iterator PI = pred_begin(BB), PE = pred_end(BB);
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PI != PE; ++PI) {
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if (!ParentRegion->contains(*PI)) {
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// It's a branch from outside into our region entry
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Pred[*PI] = BoolTrue;
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// Ignore it if it's a branch from outside into our region entry
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if (!ParentRegion->contains(*PI))
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continue;
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}
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Region *R = RI->getRegionFor(*PI);
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if (R == ParentRegion) {
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@ -355,7 +348,7 @@ void AMDGPUStructurizeCFG::analyzeNode(RegionNode *N) {
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if (Term->isConditional()) {
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// Try to treat it like an ELSE block
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BasicBlock *Other = Term->getSuccessor(!i);
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if (Visited.count(Other) && !LoopTargets.count(Other) &&
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if (Visited.count(Other) && !Loops.count(Other) &&
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!Pred.count(Other) && !Pred.count(*PI)) {
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Pred[Other] = BoolFalse;
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@ -363,13 +356,12 @@ void AMDGPUStructurizeCFG::analyzeNode(RegionNode *N) {
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continue;
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}
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}
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Pred[*PI] = buildCondition(Term, i, false);
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} else {
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// Back edge
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if (analyzeLoopStart(*PI, BB, buildCondition(Term, i, true)))
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continue;
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LPred[*PI] = buildCondition(Term, i, true);
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}
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Pred[*PI] = buildCondition(Term, i, false);
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}
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} else {
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@ -383,34 +375,10 @@ void AMDGPUStructurizeCFG::analyzeNode(RegionNode *N) {
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continue;
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BasicBlock *Entry = R->getEntry();
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if (!Visited.count(Entry))
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if (analyzeLoopStart(Entry, BB, BoolFalse))
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continue;
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Pred[Entry] = BoolTrue;
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}
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}
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}
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/// \brief Determine the end of the loop
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void AMDGPUStructurizeCFG::analyzeLoopEnd(RegionNode *N) {
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if (N->isSubRegion()) {
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// Test for exit as back edge
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BasicBlock *Exit = N->getNodeAs<Region>()->getExit();
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if (Visited.count(Exit))
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LoopEnd = N->getEntry();
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} else {
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// Test for sucessors as back edge
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BasicBlock *BB = N->getNodeAs<BasicBlock>();
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BranchInst *Term = cast<BranchInst>(BB->getTerminator());
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for (unsigned i = 0, e = Term->getNumSuccessors(); i != e; ++i) {
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BasicBlock *Succ = Term->getSuccessor(i);
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if (Visited.count(Succ))
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LoopEnd = BB;
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if (Visited.count(Entry))
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Pred[Entry] = BoolTrue;
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else
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LPred[Entry] = BoolFalse;
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}
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}
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}
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@ -422,9 +390,8 @@ void AMDGPUStructurizeCFG::collectInfos() {
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Predicates.clear();
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// and loop infos
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LoopStart = LoopEnd = 0;
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LoopTargets.clear();
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LoopPred.clear();
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Loops.clear();
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LoopPreds.clear();
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// Reset the visited nodes
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Visited.clear();
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@ -433,42 +400,37 @@ void AMDGPUStructurizeCFG::collectInfos() {
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OI != OE; ++OI) {
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// Analyze all the conditions leading to a node
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analyzeNode(*OI);
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gatherPredicates(*OI);
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// Remember that we've seen this node
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Visited.insert((*OI)->getEntry());
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// Find the last back edge
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analyzeLoopEnd(*OI);
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// Find the last back edges
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analyzeLoops(*OI);
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}
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// Both or neither must be set
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assert(!LoopStart == !LoopEnd);
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}
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/// \brief Insert the missing branch conditions
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void AMDGPUStructurizeCFG::insertConditions() {
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void AMDGPUStructurizeCFG::insertConditions(bool Loops) {
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BranchVector &Conds = Loops ? LoopConds : Conditions;
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Value *Default = Loops ? BoolTrue : BoolFalse;
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SSAUpdater PhiInserter;
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for (BranchVector::iterator I = Conditions.begin(),
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E = Conditions.end(); I != E; ++I) {
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for (BranchVector::iterator I = Conds.begin(),
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E = Conds.end(); I != E; ++I) {
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BranchInst *Term = *I;
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BasicBlock *Parent = Term->getParent();
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assert(Term->isConditional());
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Value *Default = (Parent == LoopEnd) ? BoolTrue : BoolFalse;
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BasicBlock *Parent = Term->getParent();
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BasicBlock *SuccTrue = Term->getSuccessor(0);
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BasicBlock *SuccFalse = Term->getSuccessor(1);
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PhiInserter.Initialize(Boolean, "");
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PhiInserter.AddAvailableValue(&Func->getEntryBlock(), Default);
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if (Parent == LoopEnd)
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PhiInserter.AddAvailableValue(LoopStart, BoolTrue);
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else
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PhiInserter.AddAvailableValue(Parent, BoolFalse);
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PhiInserter.AddAvailableValue(Loops ? SuccFalse : Parent, Default);
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BasicBlock *Succ = Term->getSuccessor(0);
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BBPredicates &Preds = (Parent == LoopEnd) ? LoopPred : Predicates[Succ];
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BBPredicates &Preds = Loops ? LoopPreds[SuccFalse] : Predicates[SuccTrue];
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NearestCommonDominator Dominator(DT);
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Dominator.addBlock(Parent, false);
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@ -648,54 +610,24 @@ BasicBlock *AMDGPUStructurizeCFG::getNextFlow(BasicBlock *Dominator) {
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}
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/// \brief Create a new or reuse the previous node as flow node
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BasicBlock *AMDGPUStructurizeCFG::needPrefix(RegionNode *&Prev,
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RegionNode *Node) {
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BasicBlock *AMDGPUStructurizeCFG::needPrefix(bool NeedEmpty) {
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if (!Prev || Prev->isSubRegion() ||
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(Node && Node->getEntry() == LoopStart)) {
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BasicBlock *Entry = PrevNode->getEntry();
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// We need to insert a flow node, first figure out the dominator
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DomTreeNode *Dominator = Prev ? DT->getNode(Prev->getEntry()) : 0;
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if (!Dominator)
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Dominator = DT->getNode(Node->getEntry())->getIDom();
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assert(Dominator && "Illegal loop to function entry");
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if (!PrevNode->isSubRegion()) {
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killTerminator(Entry);
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if (!NeedEmpty || Entry->getFirstInsertionPt() == Entry->end())
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return Entry;
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// then create the flow node
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BasicBlock *Flow = getNextFlow(Dominator->getBlock());
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}
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// wire up the new flow
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if (Prev) {
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changeExit(Prev, Flow, true);
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} else {
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// Parent regions entry needs predicates, create a new region entry
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BasicBlock *Entry = Node->getEntry();
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for (pred_iterator I = pred_begin(Entry), E = pred_end(Entry);
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I != E;) {
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// create a new flow node
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BasicBlock *Flow = getNextFlow(Entry);
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BasicBlock *BB = *(I++);
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if (ParentRegion->contains(BB))
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continue;
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// Remove PHY values from outside to our entry node
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delPhiValues(BB, Entry);
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// Update the branch instructions
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BB->getTerminator()->replaceUsesOfWith(Entry, Flow);
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}
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// Populate the region tree with the new entry
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for (Region *R = ParentRegion; R && R->getEntry() == Entry;
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R = R->getParent()) {
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R->replaceEntry(Flow);
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}
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}
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Prev = ParentRegion->getBBNode(Flow);
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} else {
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killTerminator(Prev->getEntry());
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}
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return Prev->getEntry();
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// and wire it up
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changeExit(PrevNode, Flow, true);
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PrevNode = ParentRegion->getBBNode(Flow);
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return Flow;
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}
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/// \brief Returns the region exit if possible, otherwise just a new flow node
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@ -711,9 +643,9 @@ BasicBlock *AMDGPUStructurizeCFG::needPostfix(BasicBlock *Flow,
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return getNextFlow(Flow);
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}
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/// \brief Returns the region node for Netx, or null if Next is the exit
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RegionNode *AMDGPUStructurizeCFG::getNextPrev(BasicBlock *Next) {
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return ParentRegion->contains(Next) ? ParentRegion->getBBNode(Next) : 0;
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/// \brief Set the previous node
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void AMDGPUStructurizeCFG::setPrevNode(BasicBlock *BB) {
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PrevNode = ParentRegion->contains(BB) ? ParentRegion->getBBNode(BB) : 0;
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}
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/// \brief Does BB dominate all the predicates of Node ?
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@ -729,11 +661,14 @@ bool AMDGPUStructurizeCFG::dominatesPredicates(BasicBlock *BB, RegionNode *Node)
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}
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/// \brief Can we predict that this node will always be called?
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bool AMDGPUStructurizeCFG::isPredictableTrue(RegionNode *Who,
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RegionNode *Where) {
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bool AMDGPUStructurizeCFG::isPredictableTrue(RegionNode *Node) {
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BBPredicates &Preds = Predicates[Who->getEntry()];
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bool Dominated = Where == 0;
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BBPredicates &Preds = Predicates[Node->getEntry()];
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bool Dominated = false;
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// Regionentry is always true
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if (PrevNode == 0)
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return true;
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for (BBPredicates::iterator I = Preds.begin(), E = Preds.end();
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I != E; ++I) {
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@ -741,7 +676,7 @@ bool AMDGPUStructurizeCFG::isPredictableTrue(RegionNode *Who,
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if (I->second != BoolTrue)
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return false;
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if (!Dominated && DT->dominates(I->first, Where->getEntry()))
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if (!Dominated && DT->dominates(I->first, PrevNode->getEntry()))
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Dominated = true;
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}
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@ -750,45 +685,69 @@ bool AMDGPUStructurizeCFG::isPredictableTrue(RegionNode *Who,
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}
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/// Take one node from the order vector and wire it up
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RegionNode *AMDGPUStructurizeCFG::wireFlow(RegionNode *&Prev,
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bool ExitUseAllowed) {
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void AMDGPUStructurizeCFG::wireFlow(bool ExitUseAllowed,
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BasicBlock *LoopEnd) {
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RegionNode *Node = Order.pop_back_val();
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Visited.insert(Node->getEntry());
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if (isPredictableTrue(Node, Prev)) {
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if (isPredictableTrue(Node)) {
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// Just a linear flow
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if (Prev) {
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changeExit(Prev, Node->getEntry(), true);
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if (PrevNode) {
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changeExit(PrevNode, Node->getEntry(), true);
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}
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Prev = Node;
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PrevNode = Node;
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} else {
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// Insert extra prefix node (or reuse last one)
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BasicBlock *Flow = needPrefix(Prev, Node);
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if (Node->getEntry() == LoopStart)
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LoopStart = Flow;
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BasicBlock *Flow = needPrefix(false);
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// Insert extra postfix node (or use exit instead)
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BasicBlock *Entry = Node->getEntry();
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BasicBlock *Next = needPostfix(Flow, ExitUseAllowed && Entry != LoopEnd);
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BasicBlock *Next = needPostfix(Flow, ExitUseAllowed);
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// let it point to entry and next block
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Conditions.push_back(BranchInst::Create(Entry, Next, BoolUndef, Flow));
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addPhiValues(Flow, Entry);
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DT->changeImmediateDominator(Entry, Flow);
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Prev = Node;
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while (!Order.empty() && Node->getEntry() != LoopEnd &&
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!LoopTargets.count(Order.back()->getEntry()) &&
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PrevNode = Node;
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while (!Order.empty() && !Visited.count(LoopEnd) &&
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dominatesPredicates(Entry, Order.back())) {
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Node = wireFlow(Prev, false);
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handleLoops(false, LoopEnd);
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}
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changeExit(Prev, Next, false);
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Prev = getNextPrev(Next);
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changeExit(PrevNode, Next, false);
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setPrevNode(Next);
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}
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}
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void AMDGPUStructurizeCFG::handleLoops(bool ExitUseAllowed,
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BasicBlock *LoopEnd) {
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RegionNode *Node = Order.back();
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BasicBlock *LoopStart = Node->getEntry();
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if (!Loops.count(LoopStart)) {
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wireFlow(ExitUseAllowed, LoopEnd);
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return;
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}
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return Node;
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if (!isPredictableTrue(Node))
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LoopStart = needPrefix(true);
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LoopEnd = Loops[Node->getEntry()];
|
||||
wireFlow(false, LoopEnd);
|
||||
while (!Visited.count(LoopEnd)) {
|
||||
handleLoops(false, LoopEnd);
|
||||
}
|
||||
|
||||
// Create an extra loop end node
|
||||
LoopEnd = needPrefix(false);
|
||||
BasicBlock *Next = needPostfix(LoopEnd, ExitUseAllowed);
|
||||
LoopConds.push_back(BranchInst::Create(Next, LoopStart,
|
||||
BoolUndef, LoopEnd));
|
||||
addPhiValues(LoopEnd, LoopStart);
|
||||
setPrevNode(Next);
|
||||
}
|
||||
|
||||
/// After this function control flow looks like it should be, but
|
||||
@ -801,26 +760,17 @@ void AMDGPUStructurizeCFG::createFlow() {
|
||||
DeletedPhis.clear();
|
||||
AddedPhis.clear();
|
||||
Conditions.clear();
|
||||
LoopConds.clear();
|
||||
|
||||
PrevNode = 0;
|
||||
Visited.clear();
|
||||
|
||||
RegionNode *Prev = 0;
|
||||
while (!Order.empty()) {
|
||||
|
||||
RegionNode *Node = wireFlow(Prev, EntryDominatesExit);
|
||||
|
||||
// Create an extra loop end node
|
||||
if (Node->getEntry() == LoopEnd) {
|
||||
LoopEnd = needPrefix(Prev, 0);
|
||||
BasicBlock *Next = needPostfix(LoopEnd, EntryDominatesExit);
|
||||
|
||||
Conditions.push_back(BranchInst::Create(Next, LoopStart,
|
||||
BoolUndef, LoopEnd));
|
||||
addPhiValues(LoopEnd, LoopStart);
|
||||
Prev = getNextPrev(Next);
|
||||
}
|
||||
handleLoops(EntryDominatesExit, 0);
|
||||
}
|
||||
|
||||
if (Prev)
|
||||
changeExit(Prev, Exit, EntryDominatesExit);
|
||||
if (PrevNode)
|
||||
changeExit(PrevNode, Exit, EntryDominatesExit);
|
||||
else
|
||||
assert(EntryDominatesExit);
|
||||
}
|
||||
@ -880,19 +830,21 @@ bool AMDGPUStructurizeCFG::runOnRegion(Region *R, RGPassManager &RGM) {
|
||||
orderNodes();
|
||||
collectInfos();
|
||||
createFlow();
|
||||
insertConditions();
|
||||
insertConditions(false);
|
||||
insertConditions(true);
|
||||
setPhiValues();
|
||||
rebuildSSA();
|
||||
|
||||
// Cleanup
|
||||
Order.clear();
|
||||
Visited.clear();
|
||||
Predicates.clear();
|
||||
DeletedPhis.clear();
|
||||
AddedPhis.clear();
|
||||
Predicates.clear();
|
||||
Conditions.clear();
|
||||
LoopTargets.clear();
|
||||
LoopPred.clear();
|
||||
Loops.clear();
|
||||
LoopPreds.clear();
|
||||
LoopConds.clear();
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue
Block a user