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GlobalISel: add some G_TRUNCs to make icmp test valid MIR.

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llvm-svn: 279579
This commit is contained in:
Tim Northover 2016-08-23 22:07:31 +00:00
parent c44c06d7a3
commit 9fc2f3ceff
1 changed files with 17 additions and 11 deletions
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28
test/CodeGen/AArch64/GlobalISel/legalize-cmp.mir
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@ -17,29 +17,35 @@ registers:
- { id: 1, class: _ } - { id: 1, class: _ }
- { id: 2, class: _ } - { id: 2, class: _ }
- { id: 3, class: _ } - { id: 3, class: _ }
- { id: 4, class: _ }
- { id: 5, class: _ }
- { id: 6, class: _ }
body: | body: |
bb.0.entry: bb.0.entry:
liveins: %x0, %x1, %x2, %x3 liveins: %x0, %x1, %x2, %x3
%0(64) = COPY %x0 %0(64) = COPY %x0
%1(64) = COPY %x1 %1(64) = COPY %x0
%4(8) = G_TRUNC { s8, s64 } %0
%5(8) = G_TRUNC { s8, s64 } %1
; CHECK: [[TST32:%[0-9]+]](32) = G_ICMP { s32, s64 } intpred(sge), %0, %1 ; CHECK: [[TST32:%[0-9]+]](32) = G_ICMP { s32, s64 } intpred(sge), %0, %1
; CHECK: %2(1) = G_TRUNC { s1, s32 } [[TST32]] ; CHECK: %2(1) = G_TRUNC { s1, s32 } [[TST32]]
%2(1) = G_ICMP { s1, s64 } intpred(sge), %0, %1 %2(1) = G_ICMP { s1, s64 } intpred(sge), %0, %1
; CHECK: [[LHS32:%[0-9]+]](32) = G_ZEXT { s32, s8 } %0 ; CHECK: [[LHS32:%[0-9]+]](32) = G_ZEXT { s32, s8 } %4
; CHECK: [[RHS32:%[0-9]+]](32) = G_ZEXT { s32, s8 } %1 ; CHECK: [[RHS32:%[0-9]+]](32) = G_ZEXT { s32, s8 } %5
; CHECK: %3(32) = G_ICMP { s32, s32 } intpred(ne), [[LHS32]], [[RHS32]] ; CHECK: %3(32) = G_ICMP { s32, s32 } intpred(ne), [[LHS32]], [[RHS32]]
%3(32) = G_ICMP { s32, s8 } intpred(ne), %0, %1 %3(32) = G_ICMP { s32, s8 } intpred(ne), %4, %5
; CHECK: [[LHS32:%[0-9]+]](32) = G_ZEXT { s32, s8 } %0 ; CHECK: [[LHS32:%[0-9]+]](32) = G_ZEXT { s32, s8 } %4
; CHECK: [[RHS32:%[0-9]+]](32) = G_ZEXT { s32, s8 } %1 ; CHECK: [[RHS32:%[0-9]+]](32) = G_ZEXT { s32, s8 } %5
; CHECK: %3(32) = G_ICMP { s32, s32 } intpred(ugt), [[LHS32]], [[RHS32]] ; CHECK: %3(32) = G_ICMP { s32, s32 } intpred(ugt), [[LHS32]], [[RHS32]]
%3(32) = G_ICMP { s32, s8 } intpred(ugt), %0, %1 %3(32) = G_ICMP { s32, s8 } intpred(ugt), %4, %5
; CHECK: [[LHS32:%[0-9]+]](32) = G_SEXT { s32, s8 } %0 ; CHECK: [[LHS32:%[0-9]+]](32) = G_SEXT { s32, s8 } %4
; CHECK: [[RHS32:%[0-9]+]](32) = G_SEXT { s32, s8 } %1 ; CHECK: [[RHS32:%[0-9]+]](32) = G_SEXT { s32, s8 } %5
; CHECK: %3(32) = G_ICMP { s32, s32 } intpred(sle), [[LHS32]], [[RHS32]] ; CHECK: %6(32) = G_ICMP { s32, s32 } intpred(sle), [[LHS32]], [[RHS32]]
%3(32) = G_ICMP { s32, s8 } intpred(sle), %0, %1 %6(32) = G_ICMP { s32, s8 } intpred(sle), %4, %5
... ...