1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-25 12:12:47 +01:00

Introduce helpers to compute the 32-bit varaints and 64-bit variants of

some architectures. These are useful for interacting with multiarch or
bi-arch GCC (or GCC-based) toolchains.

llvm-svn: 149895
This commit is contained in:
Chandler Carruth 2012-02-06 20:46:33 +00:00
parent c4f1c049cd
commit a05c6dc02c
3 changed files with 156 additions and 0 deletions

View File

@ -384,6 +384,26 @@ public:
/// the target assembler.
const char *getArchNameForAssembler();
/// @}
/// @name Helpers to build variants of a particular triple.
/// @{
/// \brief Form a triple with a 32-bit variant of the current architecture.
///
/// This can be used to move across "families" of architectures where useful.
///
/// \returns A new triple with a 32-bit architecture or an unknown
/// architecture if no such variant can be found.
llvm::Triple get32BitArchVariant() const;
/// \brief Form a triple with a 64-bit variant of the current architecture.
///
/// This can be used to move across "families" of architectures where useful.
///
/// \returns A new triple with a 64-bit architecture or an unknown
/// architecture if no such variant can be found.
llvm::Triple get64BitArchVariant() const;
/// @}
/// @name Static helpers for IDs.
/// @{

View File

@ -753,3 +753,77 @@ bool Triple::isArch32Bit() const {
bool Triple::isArch16Bit() const {
return getArchPointerBitWidth(getArch()) == 16;
}
Triple Triple::get32BitArchVariant() const {
Triple T(*this);
switch (getArch()) {
case Triple::UnknownArch:
case Triple::InvalidArch:
case Triple::msp430:
T.setArch(UnknownArch);
break;
case Triple::amdil:
case Triple::arm:
case Triple::cellspu:
case Triple::hexagon:
case Triple::le32:
case Triple::mblaze:
case Triple::mips:
case Triple::mipsel:
case Triple::ppc:
case Triple::ptx32:
case Triple::sparc:
case Triple::tce:
case Triple::thumb:
case Triple::x86:
case Triple::xcore:
// Already 32-bit.
break;
case Triple::mips64: T.setArch(Triple::mips); break;
case Triple::mips64el: T.setArch(Triple::mipsel); break;
case Triple::ppc64: T.setArch(Triple::ppc); break;
case Triple::ptx64: T.setArch(Triple::ptx32); break;
case Triple::sparcv9: T.setArch(Triple::sparc); break;
case Triple::x86_64: T.setArch(Triple::x86); break;
}
return T;
}
Triple Triple::get64BitArchVariant() const {
Triple T(*this);
switch (getArch()) {
case Triple::InvalidArch:
case Triple::UnknownArch:
case Triple::amdil:
case Triple::arm:
case Triple::cellspu:
case Triple::hexagon:
case Triple::le32:
case Triple::mblaze:
case Triple::msp430:
case Triple::tce:
case Triple::thumb:
case Triple::xcore:
T.setArch(UnknownArch);
break;
case Triple::mips64:
case Triple::mips64el:
case Triple::ppc64:
case Triple::ptx64:
case Triple::sparcv9:
case Triple::x86_64:
// Already 64-bit.
break;
case Triple::mips: T.setArch(Triple::mips64); break;
case Triple::mipsel: T.setArch(Triple::mips64el); break;
case Triple::ppc: T.setArch(Triple::ppc64); break;
case Triple::ptx32: T.setArch(Triple::ptx64); break;
case Triple::sparc: T.setArch(Triple::sparcv9); break;
case Triple::x86: T.setArch(Triple::x86_64); break;
}
return T;
}

View File

@ -324,4 +324,66 @@ TEST(TripleTest, BitWidthPredicates) {
EXPECT_TRUE(T.isArch64Bit());
}
TEST(TripleTest, BitWidthArchVariants) {
Triple T;
EXPECT_EQ(Triple::UnknownArch, T.get32BitArchVariant().getArch());
EXPECT_EQ(Triple::UnknownArch, T.get64BitArchVariant().getArch());
T.setArch(Triple::UnknownArch);
EXPECT_EQ(Triple::UnknownArch, T.get32BitArchVariant().getArch());
EXPECT_EQ(Triple::UnknownArch, T.get64BitArchVariant().getArch());
T.setArch(Triple::arm);
EXPECT_EQ(Triple::arm, T.get32BitArchVariant().getArch());
EXPECT_EQ(Triple::UnknownArch, T.get64BitArchVariant().getArch());
T.setArch(Triple::mips);
EXPECT_EQ(Triple::mips, T.get32BitArchVariant().getArch());
EXPECT_EQ(Triple::mips64, T.get64BitArchVariant().getArch());
T.setArch(Triple::mipsel);
EXPECT_EQ(Triple::mipsel, T.get32BitArchVariant().getArch());
EXPECT_EQ(Triple::mips64el, T.get64BitArchVariant().getArch());
T.setArch(Triple::ppc);
EXPECT_EQ(Triple::ppc, T.get32BitArchVariant().getArch());
EXPECT_EQ(Triple::ppc64, T.get64BitArchVariant().getArch());
T.setArch(Triple::ptx32);
EXPECT_EQ(Triple::ptx32, T.get32BitArchVariant().getArch());
EXPECT_EQ(Triple::ptx64, T.get64BitArchVariant().getArch());
T.setArch(Triple::sparc);
EXPECT_EQ(Triple::sparc, T.get32BitArchVariant().getArch());
EXPECT_EQ(Triple::sparcv9, T.get64BitArchVariant().getArch());
T.setArch(Triple::x86);
EXPECT_EQ(Triple::x86, T.get32BitArchVariant().getArch());
EXPECT_EQ(Triple::x86_64, T.get64BitArchVariant().getArch());
T.setArch(Triple::mips64);
EXPECT_EQ(Triple::mips, T.get32BitArchVariant().getArch());
EXPECT_EQ(Triple::mips64, T.get64BitArchVariant().getArch());
T.setArch(Triple::mips64el);
EXPECT_EQ(Triple::mipsel, T.get32BitArchVariant().getArch());
EXPECT_EQ(Triple::mips64el, T.get64BitArchVariant().getArch());
T.setArch(Triple::ppc64);
EXPECT_EQ(Triple::ppc, T.get32BitArchVariant().getArch());
EXPECT_EQ(Triple::ppc64, T.get64BitArchVariant().getArch());
T.setArch(Triple::ptx64);
EXPECT_EQ(Triple::ptx32, T.get32BitArchVariant().getArch());
EXPECT_EQ(Triple::ptx64, T.get64BitArchVariant().getArch());
T.setArch(Triple::sparcv9);
EXPECT_EQ(Triple::sparc, T.get32BitArchVariant().getArch());
EXPECT_EQ(Triple::sparcv9, T.get64BitArchVariant().getArch());
T.setArch(Triple::x86_64);
EXPECT_EQ(Triple::x86, T.get32BitArchVariant().getArch());
EXPECT_EQ(Triple::x86_64, T.get64BitArchVariant().getArch());
}
}