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[ARM] Fix mixup between Lo and Hi in SMLALBB formation.
llvm-svn: 298752
This commit is contained in:
parent
5fca869036
commit
a062aefd6c
@ -9517,19 +9517,19 @@ static SDValue AddCombineTo64BitSMLAL16(SDNode *AddcNode, SDNode *AddeNode,
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// be sign extended somehow or SRA'd into 32-bit values
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// (addc (adde (mul 16bit, 16bit), lo), hi)
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SDValue Mul = AddcNode->getOperand(0);
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SDValue Hi = AddcNode->getOperand(1);
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SDValue Lo = AddcNode->getOperand(1);
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if (Mul.getOpcode() != ISD::MUL) {
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Hi = AddcNode->getOperand(0);
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Lo = AddcNode->getOperand(0);
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Mul = AddcNode->getOperand(1);
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if (Mul.getOpcode() != ISD::MUL)
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return SDValue();
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}
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SDValue SRA = AddeNode->getOperand(0);
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SDValue Lo = AddeNode->getOperand(1);
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SDValue Hi = AddeNode->getOperand(1);
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if (SRA.getOpcode() != ISD::SRA) {
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SRA = AddeNode->getOperand(1);
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Lo = AddeNode->getOperand(0);
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Hi = AddeNode->getOperand(0);
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if (SRA.getOpcode() != ISD::SRA)
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return SDValue();
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}
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@ -1,15 +1,15 @@
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; RUN: llc -mtriple=arm-eabi %s -o - | FileCheck %s -check-prefix=CHECK --check-prefix=CHECK-LE
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; RUN: llc -mtriple=armv7-eabi %s -o - | FileCheck %s --check-prefix=CHECK-V7-LE
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; RUN: llc -mtriple=armv7-eabi %s -o - | FileCheck %s -check-prefix=CHECK --check-prefix=CHECK-V7-LE
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; RUN: llc -mtriple=armeb-eabi %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-BE
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; RUN: llc -mtriple=armebv7-eabi %s -o - | FileCheck %s -check-prefix=CHECK-V7-BE
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; RUN: llc -mtriple=thumbv6-eabi %s -o - | FileCheck %s -check-prefix=CHECK-V6-THUMB
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; RUN: llc -mtriple=thumbv6t2-eabi %s -o - | FileCheck %s -check-prefix=CHECK-T2-DSP
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; RUN: llc -mtriple=thumbv7-eabi %s -o - | FileCheck %s -check-prefix=CHECK-T2-DSP
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; RUN: llc -mtriple=thumbebv7-eabi %s -o - | FileCheck %s -check-prefix=CHECK-V7-THUMB-BE
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; RUN: llc -mtriple=thumbv6m-eabi %s -o - | FileCheck %s -check-prefix=CHECK-V6M-THUMB
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; RUN: llc -mtriple=thumbv7m-eabi %s -o - | FileCheck %s -check-prefix=CHECK-V7M-THUMB
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; RUN: llc -mtriple=thumbv7em-eabi %s -o - | FileCheck %s -check-prefix=CHECK-T2-DSP
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; RUN: llc -mtriple=armv5te-eabi %s -o - | FileCheck %s -check-prefix=CHECK-V5TE
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; RUN: llc -mtriple=armebv7-eabi %s -o - | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-V7-BE
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; RUN: llc -mtriple=thumbv6-eabi %s -o - | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-V6-THUMB
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; RUN: llc -mtriple=thumbv6t2-eabi %s -o - | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-T2-DSP
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; RUN: llc -mtriple=thumbv7-eabi %s -o - | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-T2-DSP
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; RUN: llc -mtriple=thumbebv7-eabi %s -o - | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-V7-THUMB-BE
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; RUN: llc -mtriple=thumbv6m-eabi %s -o - | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-V6M-THUMB
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; RUN: llc -mtriple=thumbv7m-eabi %s -o - | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-V7M-THUMB
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; RUN: llc -mtriple=thumbv7em-eabi %s -o - | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-T2-DSP
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; RUN: llc -mtriple=armv5te-eabi %s -o - | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-V5TE
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; Check generated signed and unsigned multiply accumulate long.
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define i64 @MACLongTest1(i32 %a, i32 %b, i64 %c) {
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@ -107,8 +107,8 @@ define i64 @MACLongTest6(i32 %a, i32 %b, i32 %c, i32 %d) {
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;CHECK-LABEL: MACLongTest6:
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;CHECK-V6-THUMB-NOT: smull
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;CHECK-V6-THUMB-NOT: smlal
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;CHECK: smull r12, lr, r1, r0
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;CHECK: smlal r12, lr, r3, r2
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;CHECK-LE: smull r12, lr, r1, r0
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;CHECK-LE: smlal r12, lr, r3, r2
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;CHECK-V7: smull [[RDLO:r[0-9]+]], [[RDHI:r[0-9]+]], r1, r0
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;CHECK-V7: smlal [[RDLO]], [[RDHI]], [[Rn:r[0-9]+]], [[Rm:r[0-9]+]]
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;CHECK-T2-DSP: smull [[RDLO:r[0-9]+]], [[RDHI:r[0-9]+]], r1, r0
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@ -214,20 +214,20 @@ define i64 @MACLongTest10(i32 %lhs, i32 %rhs, i32 %lo, i32 %hi) {
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define i64 @MACLongTest11(i16 %a, i16 %b, i64 %c) {
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;CHECK-LABEL: MACLongTest11:
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;CHECK-T2-DSP-NOT: sxth
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;CHECK-T2-DSP: smlalbb r3, r2
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;CHECK-T2-DSP-NEXT: mov r0, r3
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;CHECK-T2-DSP-NEXT: mov r1, r2
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;CHECK-T2-DSP: smlalbb r2, r3
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;CHECK-T2-DSP-NEXT: mov r0, r2
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;CHECK-T2-DSP-NEXT: mov r1, r3
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;CHECK-V5TE-NOT: sxth
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;CHECK-V5TE: smlalbb r3, r2
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;CHECK-V5TE-NEXT: mov r0, r3
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;CHECK-V5TE-NEXT: mov r1, r2
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;CHECK-V5TE: smlalbb r2, r3
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;CHECK-V5TE-NEXT: mov r0, r2
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;CHECK-V5TE-NEXT: mov r1, r3
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;CHECK-V7-LE-NOT: sxth
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;CHECK-V7-LE: smlalbb r3, r2
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;CHECK-V7-LE-NEXT: mov r0, r3
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;CHECK-V7-LE-NEXT: mov r1, r2
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;CHECK-V7-THUMB-BE: smlalbb r2, r3
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;CHECK-V7-THUMB-BE-NEXT: mov r0, r3
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;CHECK-V7-THUMB-BE-NEXT: mov r1, r2
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;CHECK-V7-LE: smlalbb r2, r3
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;CHECK-V7-LE-NEXT: mov r0, r2
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;CHECK-V7-LE-NEXT: mov r1, r3
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;CHECK-V7-THUMB-BE: smlalbb r3, r2
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;CHECK-V7-THUMB-BE-NEXT: mov r0, r2
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;CHECK-V7-THUMB-BE-NEXT: mov r1, r3
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;CHECK-LE-NOT: smlalbb
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;CHECK-BE-NOT: smlalbb
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;CHECK-V6M-THUMB-NOT: smlalbb
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@ -244,23 +244,23 @@ define i64 @MACLongTest12(i16 %b, i32 %t, i64 %c) {
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;CHECK-LABEL: MACLongTest12:
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;CHECK-T2-DSP-NOT: sxth
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;CHECK-T2-DSP-NOT: {{asr|lsr}}
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;CHECK-T2-DSP: smlalbt r3, r2, r0, r1
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;CHECK-T2-DSP-NEXT: mov r0, r3
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;CHECK-T2-DSP-NEXT: mov r1, r2
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;CHECK-T2-DSP: smlalbt r2, r3, r0, r1
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;CHECK-T2-DSP-NEXT: mov r0, r2
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;CHECK-T2-DSP-NEXT: mov r1, r3
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;CHECK-T2-DSP-NOT: sxth
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;CHECK-V5TE-NOT: sxth
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;CHECK-V5TE-NOT: {{asr|lsr}}
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;CHECK-V5TE: smlalbt r3, r2, r0, r1
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;CHECK-V5TE-NEXT: mov r0, r3
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;CHECK-V5TE-NEXT: mov r1, r2
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;CHECK-V5TE: smlalbt r2, r3, r0, r1
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;CHECK-V5TE-NEXT: mov r0, r2
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;CHECK-V5TE-NEXT: mov r1, r3
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;CHECK-V7-LE-NOT: sxth
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;CHECK-V7-LE-NOT: {{asr|lsr}}
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;CHECK-V7-LE: smlalbt r3, r2, r0, r1
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;CHECK-V7-LE-NEXT: mov r0, r3
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;CHECK-V7-LE-NEXT: mov r1, r2
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;CHECK-V7-THUMB-BE: smlalbt r2, r3,
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;CHECK-V7-THUMB-BE-NEXT: mov r0, r3
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;CHECK-V7-THUMB-BE-NEXT: mov r1, r2
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;CHECK-V7-LE: smlalbt r2, r3, r0, r1
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;CHECK-V7-LE-NEXT: mov r0, r2
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;CHECK-V7-LE-NEXT: mov r1, r3
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;CHECK-V7-THUMB-BE: smlalbt r3, r2,
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;CHECK-V7-THUMB-BE-NEXT: mov r0, r2
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;CHECK-V7-THUMB-BE-NEXT: mov r1, r3
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;CHECK-LE-NOT: smlalbt
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;CHECK-BE-NOT: smlalbt
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;CHECK-V6M-THUMB-NOT: smlalbt
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@ -277,22 +277,22 @@ define i64 @MACLongTest13(i32 %t, i16 %b, i64 %c) {
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;CHECK-LABEL: MACLongTest13:
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;CHECK-T2-DSP-NOT: sxth
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;CHECK-T2-DSP-NOT: {{asr|lsr}}
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;CHECK-T2-DSP: smlaltb r3, r2, r0, r1
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;CHECK-T2-DSP-NEXT: mov r0, r3
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;CHECK-T2-DSP-NEXT: mov r1, r2
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;CHECK-T2-DSP: smlaltb r2, r3, r0, r1
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;CHECK-T2-DSP-NEXT: mov r0, r2
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;CHECK-T2-DSP-NEXT: mov r1, r3
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;CHECK-V5TE-NOT: sxth
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;CHECK-V5TE-NOT: {{asr|lsr}}
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;CHECK-V5TE: smlaltb r3, r2, r0, r1
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;CHECK-V5TE-NEXT: mov r0, r3
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;CHECK-V5TE-NEXT: mov r1, r2
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;CHECK-V5TE: smlaltb r2, r3, r0, r1
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;CHECK-V5TE-NEXT: mov r0, r2
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;CHECK-V5TE-NEXT: mov r1, r3
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;CHECK-V7-LE-NOT: sxth
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;CHECK-V7-LE-NOT: {{asr|lsr}}
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;CHECK-V7-LE: smlaltb r3, r2, r0, r1
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;CHECK-V7-LE-NEXT: mov r0, r3
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;CHECK-V7-LE-NEXT: mov r1, r2
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;CHECK-V7-THUMB-BE: smlaltb r2, r3, r0, r1
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;CHECK-V7-THUMB-BE-NEXT: mov r0, r3
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;CHECK-V7-THUMB-BE-NEXT: mov r1, r2
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;CHECK-V7-LE: smlaltb r2, r3, r0, r1
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;CHECK-V7-LE-NEXT: mov r0, r2
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;CHECK-V7-LE-NEXT: mov r1, r3
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;CHECK-V7-THUMB-BE: smlaltb r3, r2, r0, r1
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;CHECK-V7-THUMB-BE-NEXT: mov r0, r2
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;CHECK-V7-THUMB-BE-NEXT: mov r1, r3
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;CHECK-LE-NOT: smlaltb
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;CHECK-BE-NOT: smlaltb
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;CHECK-V6M-THUMB-NOT: smlaltb
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@ -308,20 +308,20 @@ define i64 @MACLongTest13(i32 %t, i16 %b, i64 %c) {
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define i64 @MACLongTest14(i32 %a, i32 %b, i64 %c) {
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;CHECK-LABEL: MACLongTest14:
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;CHECK-T2-DSP-NOT: {{asr|lsr}}
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;CHECK-T2-DSP: smlaltt r3, r2,
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;CHECK-T2-DSP-NEXT: mov r0, r3
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;CHECK-T2-DSP-NEXT: mov r1, r2
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;CHECK-T2-DSP: smlaltt r2, r3,
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;CHECK-T2-DSP-NEXT: mov r0, r2
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;CHECK-T2-DSP-NEXT: mov r1, r3
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;CHECK-V5TE-NOT: {{asr|lsr}}
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;CHECK-V5TE: smlaltt r3, r2,
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;CHECK-V5TE-NEXT: mov r0, r3
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;CHECK-V5TE-NEXT: mov r1, r2
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;CHECK-V5TE: smlaltt r2, r3,
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;CHECK-V5TE-NEXT: mov r0, r2
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;CHECK-V5TE-NEXT: mov r1, r3
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;CHECK-V7-LE-NOT: {{asr|lsr}}
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;CHECK-V7-LE: smlaltt r3, r2,
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;CHECK-V7-LE-NEXT: mov r0, r3
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;CHECK-V7-LE-NEXT: mov r1, r2
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;CHECK-V7-THUMB-BE: smlaltt r2, r3,
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;CHECK-V7-THUMB-BE-NEXT: mov r0, r3
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;CHECK-V7-THUMB-BE-NEXT: mov r1, r2
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;CHECK-V7-LE: smlaltt r2, r3,
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;CHECK-V7-LE-NEXT: mov r0, r2
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;CHECK-V7-LE-NEXT: mov r1, r3
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;CHECK-V7-THUMB-BE: smlaltt r3, r2,
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;CHECK-V7-THUMB-BE-NEXT: mov r0, r2
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;CHECK-V7-THUMB-BE-NEXT: mov r1, r3
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;CHECK-LE-NOT: smlaltt
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;CHECK-BE-NOT: smlaltt
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;CHECK-V6M-THUMB-NOT: smlaltt
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@ -337,20 +337,20 @@ define i64 @MACLongTest14(i32 %a, i32 %b, i64 %c) {
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@global_b = external global i16, align 2
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;CHECK-LABEL: MACLongTest15
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;CHECK-T2-DSP-NOT: {{asr|lsr}}
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;CHECK-T2-DSP: smlaltb r3, r2, r0, r1
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;CHECK-T2-DSP-NEXT: mov r0, r3
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;CHECK-T2-DSP-NEXT: mov r1, r2
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;CHECK-T2-DSP: smlaltb r2, r3, r0, r1
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;CHECK-T2-DSP-NEXT: mov r0, r2
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;CHECK-T2-DSP-NEXT: mov r1, r3
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;CHECK-V5TE-NOT: {{asr|lsr}}
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;CHECK-V5TE: smlaltb r3, r2, r0, r1
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;CHECK-V5TE-NEXT: mov r0, r3
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;CHECK-V5TE-NEXT: mov r1, r2
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;CHECK-V5TE: smlaltb r2, r3, r0, r1
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;CHECK-V5TE-NEXT: mov r0, r2
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;CHECK-V5TE-NEXT: mov r1, r3
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;CHECK-V7-LE-NOT: {{asr|lsr}}
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;CHECK-V7-LE: smlaltb r3, r2, r0, r1
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;CHECK-V7-LE-NEXT: mov r0, r3
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;CHECK-V7-LE-NEXT: mov r1, r2
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;CHECK-V7-THUMB-BE: smlaltb r2, r3, r0, r1
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;CHECK-V7-THUMB-BE-NEXT: mov r0, r3
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;CHECK-V7-THUMB-BE-NEXT: mov r1, r2
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;CHECK-V7-LE: smlaltb r2, r3, r0, r1
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;CHECK-V7-LE-NEXT: mov r0, r2
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;CHECK-V7-LE-NEXT: mov r1, r3
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;CHECK-V7-THUMB-BE: smlaltb r3, r2, r0, r1
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;CHECK-V7-THUMB-BE-NEXT: mov r0, r2
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;CHECK-V7-THUMB-BE-NEXT: mov r1, r3
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;CHECK-LE-NOT: smlaltb
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;CHECK-BE-NOT: smlaltb
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;CHECK-V6M-THUMB-NOT: smlaltb
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@ -368,19 +368,19 @@ entry:
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;CHECK-LABEL: MACLongTest16
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;CHECK-T2-DSP-NOT: {{asr|lsr}}
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;CHECK-T2-DSP: smlalbt r3, r2, r1, r0
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;CHECK-T2-DSP-NEXT: mov r0, r3
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;CHECK-T2-DSP-NEXT: mov r1, r2
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;CHECK-T2-DSP: smlalbt r2, r3, r1, r0
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;CHECK-T2-DSP-NEXT: mov r0, r2
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;CHECK-T2-DSP-NEXT: mov r1, r3
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;CHECK-V5TE-NOT: {{asr|lsr}}
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;CHECK-V5TE: smlalbt r3, r2, r1, r0
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;CHECK-V5TE-NEXT: mov r0, r3
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;CHECK-V5TE-NEXT: mov r1, r2
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;CHECK-V7-LE: smlalbt r3, r2, r1, r0
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;CHECK-V7-LE-NEXT: mov r0, r3
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;CHECK-V7-LE-NEXT: mov r1, r2
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;CHECK-V7-THUMB-BE: smlalbt r2, r3, r1, r0
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;CHECK-V7-THUMB-BE-NEXT: mov r0, r3
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;CHECK-V7-THUMB-BE-NEXT: mov r1, r2
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;CHECK-V5TE: smlalbt r2, r3, r1, r0
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;CHECK-V5TE-NEXT: mov r0, r2
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;CHECK-V5TE-NEXT: mov r1, r3
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;CHECK-V7-LE: smlalbt r2, r3, r1, r0
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;CHECK-V7-LE-NEXT: mov r0, r2
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;CHECK-V7-LE-NEXT: mov r1, r3
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;CHECK-V7-THUMB-BE: smlalbt r3, r2, r1, r0
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;CHECK-V7-THUMB-BE-NEXT: mov r0, r2
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;CHECK-V7-THUMB-BE-NEXT: mov r1, r3
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;CHECK-LE-NOT: smlalbt
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;CHECK-BE-NOT: smlalbt
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;CHECK-V6M-THUMB-NOT: smlalbt
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