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mark this as beta
llvm-svn: 23906
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@ -22,7 +22,7 @@ include "../Target.td"
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def Feature64Bit : SubtargetFeature<"64bit",
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"Enable 64-bit instructions">;
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def Feature64BitRegs : SubtargetFeature<"64bitregs",
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"Enable 64-bit registers">;
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"Enable 64-bit registers [beta]">;
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def FeatureAltivec : SubtargetFeature<"altivec",
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"Enable Altivec instructions">;
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def FeatureGPUL : SubtargetFeature<"gpul",
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