RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-25 20:23:11 +01:00
Code Issues Projects Releases Wiki Activity

Teach the scheduler to emit the appropriate INLINEASM MachineInstr for an

Browse Source 
ISD::INLINEASM node.

llvm-svn: 25668
This commit is contained in:
Chris Lattner 2006-01-26 23:28:04 +00:00
parent b234392bc5
commit a1769576f0
1 changed files with 29 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

29
lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
View File

@ -283,6 +283,35 @@ void ScheduleDAG::EmitNode(NodeInfo *NI) {
MRI->copyRegToReg(*BB, BB->end(), VRBase, SrcReg, TRC);
break;
}
case ISD::INLINEASM: {
unsigned NumOps = Node->getNumOperands();
if (Node->getOperand(NumOps-1).getValueType() == MVT::Flag)
--NumOps; // Ignore the flag operand.
// Create the inline asm machine instruction.
MachineInstr *MI =
new MachineInstr(BB, TargetInstrInfo::INLINEASM, (NumOps-2)/2+1);
// Add the asm string as an external symbol operand.
const char *AsmStr =
cast<ExternalSymbolSDNode>(Node->getOperand(1))->getSymbol();
MI->addExternalSymbolOperand(AsmStr, false);
// Add all of the operand registers to the instruction.
for (unsigned i = 2; i != NumOps; i += 2) {
unsigned Reg = cast<RegisterSDNode>(Node->getOperand(i))->getReg();
unsigned Flags = cast<ConstantSDNode>(Node->getOperand(i))->getValue();
MachineOperand::UseType UseTy;
switch (Flags) {
default: assert(0 && "Bad flags!");
case 1: UseTy = MachineOperand::Use; break;
case 2: UseTy = MachineOperand::Def; break;
case 3: UseTy = MachineOperand::UseAndDef; break;
}
MI->addMachineRegOperand(Reg, UseTy);
}
break;
}
}
}