From a1cb49539d30d0bf6e5ee3ab6bbe71dc24210354 Mon Sep 17 00:00:00 2001
From: Andrea Di Biagio <Andrea_DiBiagio@sn.scee.net>
Date: Tue, 26 Mar 2019 15:38:37 +0000
Subject: [PATCH] [MCA] Correctly update the UsedResourceGroups mask in the
 InstrBuilder.

Found by inspection when looking at the debug output of MCA.
This problem was latent, and none of the upstream models were affected by it.
No functional change intended.

llvm-svn: 357000
---
 include/llvm/MCA/Stages/DispatchStage.h |  4 +---
 lib/MCA/InstrBuilder.cpp                |  1 +
 lib/MCA/Stages/DispatchStage.cpp        | 10 ++++++++++
 tools/llvm-mca/Views/SummaryView.cpp    |  3 ++-
 tools/llvm-mca/llvm-mca.cpp             |  8 ++------
 5 files changed, 16 insertions(+), 10 deletions(-)

diff --git a/include/llvm/MCA/Stages/DispatchStage.h b/include/llvm/MCA/Stages/DispatchStage.h
index e39f03e3263..d80ededeaca 100644
--- a/include/llvm/MCA/Stages/DispatchStage.h
+++ b/include/llvm/MCA/Stages/DispatchStage.h
@@ -68,9 +68,7 @@ class DispatchStage final : public Stage {
 public:
   DispatchStage(const MCSubtargetInfo &Subtarget, const MCRegisterInfo &MRI,
                 unsigned MaxDispatchWidth, RetireControlUnit &R,
-                RegisterFile &F)
-      : DispatchWidth(MaxDispatchWidth), AvailableEntries(MaxDispatchWidth),
-        CarryOver(0U), CarriedOver(), STI(Subtarget), RCU(R), PRF(F) {}
+                RegisterFile &F);
 
   bool isAvailable(const InstRef &IR) const override;
 
diff --git a/lib/MCA/InstrBuilder.cpp b/lib/MCA/InstrBuilder.cpp
index e10efb28f77..89904e75cc1 100644
--- a/lib/MCA/InstrBuilder.cpp
+++ b/lib/MCA/InstrBuilder.cpp
@@ -115,6 +115,7 @@ static void initializeUsedResources(InstrDesc &ID,
     } else {
       // Remove the leading 1 from the resource group mask.
       NormalizedMask ^= PowerOf2Floor(NormalizedMask);
+      UsedResourceGroups |= (A.first ^ NormalizedMask);
     }
 
     for (unsigned J = I + 1; J < E; ++J) {
diff --git a/lib/MCA/Stages/DispatchStage.cpp b/lib/MCA/Stages/DispatchStage.cpp
index ae3d3fd6743..b55ac70307a 100644
--- a/lib/MCA/Stages/DispatchStage.cpp
+++ b/lib/MCA/Stages/DispatchStage.cpp
@@ -25,6 +25,16 @@
 namespace llvm {
 namespace mca {
 
+DispatchStage::DispatchStage(const MCSubtargetInfo &Subtarget,
+                             const MCRegisterInfo &MRI,
+                             unsigned MaxDispatchWidth, RetireControlUnit &R,
+                             RegisterFile &F)
+    : DispatchWidth(MaxDispatchWidth), AvailableEntries(MaxDispatchWidth),
+      CarryOver(0U), CarriedOver(), STI(Subtarget), RCU(R), PRF(F) {
+  if (!DispatchWidth)
+    DispatchWidth = Subtarget.getSchedModel().IssueWidth;
+}
+
 void DispatchStage::notifyInstructionDispatched(const InstRef &IR,
                                                 ArrayRef<unsigned> UsedRegs,
                                                 unsigned UOps) const {
diff --git a/tools/llvm-mca/Views/SummaryView.cpp b/tools/llvm-mca/Views/SummaryView.cpp
index e3d85507dc8..5aa53b2df90 100644
--- a/tools/llvm-mca/Views/SummaryView.cpp
+++ b/tools/llvm-mca/Views/SummaryView.cpp
@@ -24,7 +24,8 @@ namespace mca {
 
 SummaryView::SummaryView(const MCSchedModel &Model, ArrayRef<MCInst> S,
                          unsigned Width, bool EmitBottleneckAnalysis)
-    : SM(Model), Source(S), DispatchWidth(Width), LastInstructionIdx(0),
+    : SM(Model), Source(S), DispatchWidth(Width?Width: Model.IssueWidth),
+      LastInstructionIdx(0),
       TotalCycles(0), NumMicroOps(0), BPI({0, 0, 0, 0, 0}),
       ResourcePressureDistribution(Model.getNumProcResourceKinds(), 0),
       ProcResourceUsage(Model.getNumProcResourceKinds(), 0),
diff --git a/tools/llvm-mca/llvm-mca.cpp b/tools/llvm-mca/llvm-mca.cpp
index 17b19d1818f..ce253af1fe7 100644
--- a/tools/llvm-mca/llvm-mca.cpp
+++ b/tools/llvm-mca/llvm-mca.cpp
@@ -381,17 +381,13 @@ int main(int argc, char **argv) {
 
   const MCSchedModel &SM = STI->getSchedModel();
 
-  unsigned Width = SM.IssueWidth;
-  if (DispatchWidth)
-    Width = DispatchWidth;
-
   // Create an instruction builder.
   mca::InstrBuilder IB(*STI, *MCII, *MRI, MCIA.get());
 
   // Create a context to control ownership of the pipeline hardware.
   mca::Context MCA(*MRI, *STI);
 
-  mca::PipelineOptions PO(Width, RegisterFileSize, LoadQueueSize,
+  mca::PipelineOptions PO(DispatchWidth, RegisterFileSize, LoadQueueSize,
                           StoreQueueSize, AssumeNoAlias,
                           EnableBottleneckAnalysis);
 
@@ -470,7 +466,7 @@ int main(int argc, char **argv) {
 
     if (PrintSummaryView)
       Printer.addView(llvm::make_unique<mca::SummaryView>(
-          SM, Insts, Width, EnableBottleneckAnalysis));
+          SM, Insts, DispatchWidth, EnableBottleneckAnalysis));
 
     if (PrintInstructionInfoView)
       Printer.addView(