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AArch64_BE function argument passing for ARM ABI

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llvm-svn: 204814
This commit is contained in:
Christian Pirker 2014-03-26 14:51:22 +00:00
parent b04f8773c1
commit a1df68e278
5 changed files with 56 additions and 20 deletions
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13
lib/Target/AArch64/AArch64ISelLowering.cpp
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@ -1324,8 +1324,11 @@ AArch64TargetLowering::LowerFormalArguments(SDValue Chain,
int Size = Flags.getByValSize();
unsigned NumRegs = (Size + 7) / 8;
uint32_t BEAlign = 0;
if (Size < 8 && !getSubtarget()->isLittle())
BEAlign = 8-Size;
unsigned FrameIdx = MFI->CreateFixedObject(8 * NumRegs,
VA.getLocMemOffset(),
VA.getLocMemOffset() + BEAlign,
false);
SDValue FrameIdxN = DAG.getFrameIndex(FrameIdx, PtrTy);
InVals.push_back(FrameIdxN);
@ -1634,7 +1637,13 @@ AArch64TargetLowering::LowerCall(CallLoweringInfo &CLI,
// loaded before this eventual operation. Otherwise they'll be clobbered.
Chain = addTokenForArgument(Chain, DAG, MF.getFrameInfo(), FI);
} else {
SDValue PtrOff = DAG.getIntPtrConstant(VA.getLocMemOffset());
uint32_t OpSize = Flags.isByVal() ? Flags.getByValSize()*8 :
VA.getLocVT().getSizeInBits();
OpSize = (OpSize + 7) / 8;
uint32_t BEAlign = 0;
if (OpSize < 8 && !getSubtarget()->isLittle())
BEAlign = 8-OpSize;
SDValue PtrOff = DAG.getIntPtrConstant(VA.getLocMemOffset() + BEAlign);
DstAddr = DAG.getNode(ISD::ADD, dl, getPointerTy(), StackPtr, PtrOff);
DstInfo = MachinePointerInfo::getStack(VA.getLocMemOffset());

33
test/CodeGen/AArch64/adc.ll
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@ -1,15 +1,20 @@
; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu | FileCheck %s
; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu | FileCheck --check-prefix=CHECK --check-prefix=CHECK-LE %s
; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64_be-none-linux-gnu | FileCheck --check-prefix=CHECK --check-prefix=CHECK-BE %s
define i128 @test_simple(i128 %a, i128 %b, i128 %c) {
; CHECK-LABEL: test_simple:
%valadd = add i128 %a, %b
; CHECK: adds [[ADDLO:x[0-9]+]], x0, x2
; CHECK-NEXT: adcs [[ADDHI:x[0-9]+]], x1, x3
; CHECK-LE: adds [[ADDLO:x[0-9]+]], x0, x2
; CHECK-LE-NEXT: adcs [[ADDHI:x[0-9]+]], x1, x3
; CHECK-BE: adds [[ADDLO:x[0-9]+]], x1, x3
; CHECK-BE-NEXT: adcs [[ADDHI:x[0-9]+]], x0, x2
%valsub = sub i128 %valadd, %c
; CHECK: subs x0, [[ADDLO]], x4
; CHECK: sbcs x1, [[ADDHI]], x5
; CHECK-LE: subs x0, [[ADDLO]], x4
; CHECK-LE: sbcs x1, [[ADDHI]], x5
; CHECK-BE: subs x1, [[ADDLO]], x5
; CHECK-BE: sbcs x0, [[ADDHI]], x4
ret i128 %valsub
; CHECK: ret
@ -19,8 +24,10 @@ define i128 @test_imm(i128 %a) {
; CHECK-LABEL: test_imm:
%val = add i128 %a, 12
; CHECK: adds x0, x0, #12
; CHECK: adcs x1, x1, {{x[0-9]|xzr}}
; CHECK-LE: adds x0, x0, #12
; CHECK-LE: adcs x1, x1, {{x[0-9]|xzr}}
; CHECK-BE: adds x1, x1, #12
; CHECK-BE: adcs x0, x0, {{x[0-9]|xzr}}
ret i128 %val
; CHECK: ret
@ -32,8 +39,10 @@ define i128 @test_shifted(i128 %a, i128 %b) {
%rhs = shl i128 %b, 45
%val = add i128 %a, %rhs
; CHECK: adds x0, x0, x2, lsl #45
; CHECK: adcs x1, x1, {{x[0-9]}}
; CHECK-LE: adds x0, x0, x2, lsl #45
; CHECK-LE: adcs x1, x1, {{x[0-9]}}
; CHECK-BE: adds x1, x1, x3, lsl #45
; CHECK-BE: adcs x0, x0, {{x[0-9]}}
ret i128 %val
; CHECK: ret
@ -46,8 +55,10 @@ define i128 @test_extended(i128 %a, i16 %b) {
%rhs = shl i128 %ext, 3
%val = add i128 %a, %rhs
; CHECK: adds x0, x0, w2, sxth #3
; CHECK: adcs x1, x1, {{x[0-9]}}
; CHECK-LE: adds x0, x0, w2, sxth #3
; CHECK-LE: adcs x1, x1, {{x[0-9]}}
; CHECK-BE: adds x1, x1, w2, sxth #3
; CHECK-BE: adcs x0, x0, {{x[0-9]}}
ret i128 %val
; CHECK: ret

13
test/CodeGen/AArch64/func-argpassing.ll
View File

@ -1,5 +1,7 @@
; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu | FileCheck %s
; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu | FileCheck --check-prefix=CHECK --check-prefix=CHECK-LE %s
; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu -mattr=-fp-armv8 | FileCheck --check-prefix=CHECK-NOFP %s
; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64_be-none-linux-gnu | FileCheck --check-prefix=CHECK --check-prefix=CHECK-BE %s
; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64_be-none-linux-gnu -mattr=-fp-armv8 | FileCheck --check-prefix=CHECK-NOFP %s
%myStruct = type { i64 , i8, i32 }
@ -146,7 +148,8 @@ define i32 @struct_on_stack(i8 %var0, i16 %var1, i32 %var2, i64 %var3, i128 %var
%retval = load volatile i32* %stacked
ret i32 %retval
; CHECK: ldr w0, [sp, #16]
; CHECK-LE: ldr w0, [sp, #16]
; CHECK-BE: ldr w0, [sp, #20]
}
define void @stacked_fpu(float %var0, double %var1, float %var2, float %var3,
@ -180,8 +183,10 @@ define void @check_i128_stackalign(i32 %val0, i32 %val1, i32 %val2, i32 %val3,
; CHECK: check_i128_stackalign
store i128 %stack2, i128* @var128
; Nothing local on stack in current codegen, so first stack is 16 away
; CHECK: add x[[REG:[0-9]+]], sp, #16
; CHECK: ldr {{x[0-9]+}}, [x[[REG]], #8]
; CHECK-LE: add x[[REG:[0-9]+]], sp, #16
; CHECK-LE: ldr {{x[0-9]+}}, [x[[REG]], #8]
; CHECK-BE: ldr {{x[0-9]+}}, [sp, #24]
; Important point is that we address sp+24 for second dword
; CHECK: ldr {{x[0-9]+}}, [sp, #16]
ret void

8
test/CodeGen/AArch64/func-calls.ll
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@ -1,5 +1,7 @@
; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu | FileCheck %s
; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64_be-none-linux-gnu | FileCheck --check-prefix=CHECK --check-prefix=CHECK-BE %s
; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu -mattr=-fp-armv8 | FileCheck --check-prefix=CHECK-NOFP %s
; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64_be-none-linux-gnu -mattr=-fp-armv8 | FileCheck --check-prefix=CHECK-BE --check-prefix=CHECK-NOFP %s
%myStruct = type { i64 , i8, i32 }
@ -126,8 +128,10 @@ define void @check_i128_align() {
call void @check_i128_regalign(i32 0, i128 42)
; CHECK-NOT: mov x1
; CHECK: movz x2, #42
; CHECK: mov x3, xzr
; CHECK-LE: movz x2, #42
; CHECK-LE: mov x3, xzr
; CHECK-BE: movz x3, #42
; CHECK-BE: mov x2, xzr
; CHECK: bl check_i128_regalign
ret void

9
test/CodeGen/AArch64/mul-lohi.ll
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@ -1,12 +1,19 @@
; RUN: llc -mtriple=aarch64-linux-gnu %s -o - | FileCheck %s
; RUN: llc -mtriple=aarch64_be-linux-gnu %s -o - | FileCheck --check-prefix=CHECK-BE %s
define i128 @test_128bitmul(i128 %lhs, i128 %rhs) {
; CHECK: test_128bitmul:
; CHECK-LABEL: test_128bitmul:
; CHECK-DAG: umulh [[CARRY:x[0-9]+]], x0, x2
; CHECK-DAG: madd [[PART1:x[0-9]+]], x0, x3, [[CARRY]]
; CHECK: madd x1, x1, x2, [[PART1]]
; CHECK: mul x0, x0, x2
; CHECK-BE-LABEL: test_128bitmul:
; CHECK-BE-DAG: umulh [[CARRY:x[0-9]+]], x1, x3
; CHECK-BE-DAG: madd [[PART1:x[0-9]+]], x1, x2, [[CARRY]]
; CHECK-BE: madd x0, x0, x3, [[PART1]]
; CHECK-BE: mul x1, x1, x3
%prod = mul i128 %lhs, %rhs
ret i128 %prod
}