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[GISel]: Add MachineIRBuilder support for passing in Flags while building
https://reviews.llvm.org/D55516 Add the ability to pass in flags to buildInstr calls. Currently no validation is performed but that can be easily performed based on the opcode (if necessary). Reviewed by: paquette. llvm-svn: 348893
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@ -78,7 +78,8 @@ public:
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// Try to provide an overload for buildInstr for binary ops in order to
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// constant fold.
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MachineInstrBuilder buildInstr(unsigned Opc, ArrayRef<DstOp> DstOps,
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ArrayRef<SrcOp> SrcOps) override {
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ArrayRef<SrcOp> SrcOps,
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Optional<unsigned> Flags = None) override {
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switch (Opc) {
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default:
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break;
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@ -1058,8 +1058,9 @@ public:
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/// \return a MachineInstrBuilder for the newly created instruction.
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MachineInstrBuilder buildAdd(const DstOp &Dst, const SrcOp &Src0,
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const SrcOp &Src1) {
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return buildInstr(TargetOpcode::G_ADD, {Dst}, {Src0, Src1});
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const SrcOp &Src1,
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Optional<unsigned> Flags = None) {
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return buildInstr(TargetOpcode::G_ADD, {Dst}, {Src0, Src1}, Flags);
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}
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/// Build and insert \p Res = G_SUB \p Op0, \p Op1
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@ -1074,8 +1075,9 @@ public:
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/// \return a MachineInstrBuilder for the newly created instruction.
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MachineInstrBuilder buildSub(const DstOp &Dst, const SrcOp &Src0,
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const SrcOp &Src1) {
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return buildInstr(TargetOpcode::G_SUB, {Dst}, {Src0, Src1});
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const SrcOp &Src1,
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Optional<unsigned> Flags = None) {
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return buildInstr(TargetOpcode::G_SUB, {Dst}, {Src0, Src1}, Flags);
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}
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/// Build and insert \p Res = G_MUL \p Op0, \p Op1
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@ -1089,8 +1091,9 @@ public:
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///
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/// \return a MachineInstrBuilder for the newly created instruction.
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MachineInstrBuilder buildMul(const DstOp &Dst, const SrcOp &Src0,
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const SrcOp &Src1) {
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return buildInstr(TargetOpcode::G_MUL, {Dst}, {Src0, Src1});
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const SrcOp &Src1,
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Optional<unsigned> Flags = None) {
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return buildInstr(TargetOpcode::G_MUL, {Dst}, {Src0, Src1}, Flags);
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}
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/// Build and insert \p Res = G_AND \p Op0, \p Op1
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@ -1125,7 +1128,8 @@ public:
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}
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virtual MachineInstrBuilder buildInstr(unsigned Opc, ArrayRef<DstOp> DstOps,
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ArrayRef<SrcOp> SrcOps);
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ArrayRef<SrcOp> SrcOps,
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Optional<unsigned> Flags = None);
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};
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} // End namespace llvm.
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@ -786,7 +786,8 @@ void MachineIRBuilder::validateSelectOp(const LLT &ResTy, const LLT &TstTy,
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MachineInstrBuilder MachineIRBuilder::buildInstr(unsigned Opc,
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ArrayRef<DstOp> DstOps,
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ArrayRef<SrcOp> SrcOps) {
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ArrayRef<SrcOp> SrcOps,
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Optional<unsigned> Flags) {
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switch (Opc) {
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default:
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break;
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@ -995,5 +996,7 @@ MachineInstrBuilder MachineIRBuilder::buildInstr(unsigned Opc,
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Op.addDefToMIB(*getMRI(), MIB);
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for (const SrcOp &Op : SrcOps)
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Op.addSrcToMIB(MIB);
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if (Flags)
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MIB->setFlags(*Flags);
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return MIB;
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}
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