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[GISel]: Add MachineIRBuilder support for passing in Flags while building

https://reviews.llvm.org/D55516

Add the ability to pass in flags to buildInstr calls. Currently no
validation is performed but that can be easily performed based on the
opcode (if necessary).

Reviewed by: paquette.

llvm-svn: 348893
This commit is contained in:
Aditya Nandakumar 2018-12-11 20:04:40 +00:00
parent 5a4198704c
commit a25a255bdb
3 changed files with 17 additions and 9 deletions

View File

@ -78,7 +78,8 @@ public:
// Try to provide an overload for buildInstr for binary ops in order to
// constant fold.
MachineInstrBuilder buildInstr(unsigned Opc, ArrayRef<DstOp> DstOps,
ArrayRef<SrcOp> SrcOps) override {
ArrayRef<SrcOp> SrcOps,
Optional<unsigned> Flags = None) override {
switch (Opc) {
default:
break;

View File

@ -1058,8 +1058,9 @@ public:
/// \return a MachineInstrBuilder for the newly created instruction.
MachineInstrBuilder buildAdd(const DstOp &Dst, const SrcOp &Src0,
const SrcOp &Src1) {
return buildInstr(TargetOpcode::G_ADD, {Dst}, {Src0, Src1});
const SrcOp &Src1,
Optional<unsigned> Flags = None) {
return buildInstr(TargetOpcode::G_ADD, {Dst}, {Src0, Src1}, Flags);
}
/// Build and insert \p Res = G_SUB \p Op0, \p Op1
@ -1074,8 +1075,9 @@ public:
/// \return a MachineInstrBuilder for the newly created instruction.
MachineInstrBuilder buildSub(const DstOp &Dst, const SrcOp &Src0,
const SrcOp &Src1) {
return buildInstr(TargetOpcode::G_SUB, {Dst}, {Src0, Src1});
const SrcOp &Src1,
Optional<unsigned> Flags = None) {
return buildInstr(TargetOpcode::G_SUB, {Dst}, {Src0, Src1}, Flags);
}
/// Build and insert \p Res = G_MUL \p Op0, \p Op1
@ -1089,8 +1091,9 @@ public:
///
/// \return a MachineInstrBuilder for the newly created instruction.
MachineInstrBuilder buildMul(const DstOp &Dst, const SrcOp &Src0,
const SrcOp &Src1) {
return buildInstr(TargetOpcode::G_MUL, {Dst}, {Src0, Src1});
const SrcOp &Src1,
Optional<unsigned> Flags = None) {
return buildInstr(TargetOpcode::G_MUL, {Dst}, {Src0, Src1}, Flags);
}
/// Build and insert \p Res = G_AND \p Op0, \p Op1
@ -1125,7 +1128,8 @@ public:
}
virtual MachineInstrBuilder buildInstr(unsigned Opc, ArrayRef<DstOp> DstOps,
ArrayRef<SrcOp> SrcOps);
ArrayRef<SrcOp> SrcOps,
Optional<unsigned> Flags = None);
};
} // End namespace llvm.

View File

@ -786,7 +786,8 @@ void MachineIRBuilder::validateSelectOp(const LLT &ResTy, const LLT &TstTy,
MachineInstrBuilder MachineIRBuilder::buildInstr(unsigned Opc,
ArrayRef<DstOp> DstOps,
ArrayRef<SrcOp> SrcOps) {
ArrayRef<SrcOp> SrcOps,
Optional<unsigned> Flags) {
switch (Opc) {
default:
break;
@ -995,5 +996,7 @@ MachineInstrBuilder MachineIRBuilder::buildInstr(unsigned Opc,
Op.addDefToMIB(*getMRI(), MIB);
for (const SrcOp &Op : SrcOps)
Op.addSrcToMIB(MIB);
if (Flags)
MIB->setFlags(*Flags);
return MIB;
}