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[X86] Lower zext i1 arguments

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i1 is now a legal type for X86 with AVX512.
There were some paths in X86FastISel which were not quite ready to see
an i1 value: they were not quite sure how to deal with sign/zero extends
for call arguments.
DTRT by extending to i8 for zeroext and bailing out of FastISel for
signext.

This fixes PR27591.

llvm-svn: 268470
This commit is contained in:
David Majnemer 2016-05-04 00:22:23 +00:00
parent 4d0ef61846
commit a2740cd234
2 changed files with 57 additions and 0 deletions
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15
lib/Target/X86/X86FastISel.cpp
View File

@ -3019,6 +3019,10 @@ bool X86FastISel::fastLowerCall(CallLoweringInfo &CLI) {
case CCValAssign::SExt: { case CCValAssign::SExt: {
assert(VA.getLocVT().isInteger() && !VA.getLocVT().isVector() && assert(VA.getLocVT().isInteger() && !VA.getLocVT().isVector() &&
"Unexpected extend"); "Unexpected extend");
if (ArgVT.SimpleTy == MVT::i1)
return false;
bool Emitted = X86FastEmitExtend(ISD::SIGN_EXTEND, VA.getLocVT(), ArgReg, bool Emitted = X86FastEmitExtend(ISD::SIGN_EXTEND, VA.getLocVT(), ArgReg,
ArgVT, ArgReg); ArgVT, ArgReg);
assert(Emitted && "Failed to emit a sext!"); (void)Emitted; assert(Emitted && "Failed to emit a sext!"); (void)Emitted;
@ -3028,6 +3032,17 @@ bool X86FastISel::fastLowerCall(CallLoweringInfo &CLI) {
case CCValAssign::ZExt: { case CCValAssign::ZExt: {
assert(VA.getLocVT().isInteger() && !VA.getLocVT().isVector() && assert(VA.getLocVT().isInteger() && !VA.getLocVT().isVector() &&
"Unexpected extend"); "Unexpected extend");
// Handle zero-extension from i1 to i8, which is common.
if (ArgVT.SimpleTy == MVT::i1) {
// Set the high bits to zero.
ArgReg = fastEmitZExtFromI1(MVT::i8, ArgReg, /*TODO: Kill=*/false);
ArgVT = MVT::i8;
if (ArgReg == 0)
return false;
}
bool Emitted = X86FastEmitExtend(ISD::ZERO_EXTEND, VA.getLocVT(), ArgReg, bool Emitted = X86FastEmitExtend(ISD::ZERO_EXTEND, VA.getLocVT(), ArgReg,
ArgVT, ArgReg); ArgVT, ArgReg);
assert(Emitted && "Failed to emit a zext!"); (void)Emitted; assert(Emitted && "Failed to emit a zext!"); (void)Emitted;

42
test/CodeGen/X86/pr27591.ll Normal file
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@ -0,0 +1,42 @@
; RUN: llc -o - -O0 < %s | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
define void @test1(i32 %x) #0 {
entry:
%tobool = icmp ne i32 %x, 0
call void @callee1(i1 zeroext %tobool)
ret void
}
; CHECK-LABEL: test1:
; CHECK: cmpl $0, %edi
; CHECK-NEXT: setne %al
; CHECK-NEXT: andb $1, %al
; CHECK-NEXT: movzbl %al, %edi
; CHECK-NEXT: callq callee1
define void @test2(i32 %x) #0 {
entry:
%tobool = icmp ne i32 %x, 0
call void @callee2(i1 signext %tobool)
ret void
}
; CHECK-LABEL: test2:
; CHECK: cmpl $0, %edi
; CHECK-NEXT: setne %al
; CHECK-NEXT: kmovb %eax, %k0
; CHECK-NEXT: kmovw %k0, %edi
; CHECK-NEXT: andl $1, %edi
; CHECK-NEXT: movb %dil, %al
; CHECK-NEXT: xorl %edi, %edi
; CHECK-NEXT: testb %al, %al
; CHECK-NEXT: movl $-1, %ecx
; CHECK-NEXT: cmovnel %ecx, %edi
; CHECK-NEXT: callq callee2
declare void @callee1(i1 zeroext)
declare void @callee2(i1 signext)
attributes #0 = { nounwind "target-cpu"="skylake-avx512" }