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[AMDGPU] Add infer address spaces pass before SROA
It adds it for the target after inlining but before SROA where we can get most out of it. Differential Revision: https://reviews.llvm.org/D34366 llvm-svn: 305759
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@ -342,6 +342,14 @@ void AMDGPUTargetMachine::adjustPassManager(PassManagerBuilder &Builder) {
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PM.add(createAMDGPUExternalAAWrapperPass());
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}
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});
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Builder.addExtension(
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PassManagerBuilder::EP_CGSCCOptimizerLate,
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[](const PassManagerBuilder &, legacy::PassManagerBase &PM) {
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// Add infer address spaces pass to the opt pipeline after inlining
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// but before SROA to increase SROA opportunities.
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PM.add(createInferAddressSpacesPass());
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});
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}
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//===----------------------------------------------------------------------===//
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10
test/CodeGen/AMDGPU/infer-addrpace-pipeline.ll
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10
test/CodeGen/AMDGPU/infer-addrpace-pipeline.ll
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@ -0,0 +1,10 @@
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; RUN: opt -mtriple=amdgcn--amdhsa -disable-output -disable-verify -debug-pass=Structure -O2 %s 2>&1 | FileCheck -check-prefix=GCN %s
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; GCN: Function Integration/Inlining
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; GCN: FunctionPass Manager
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; GCN: Infer address spaces
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; GCN: SROA
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define void @empty() {
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ret void
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}
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